{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1329H-133AXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1329H-133AXC","canonicalUrl":"https://icboms.com/infineon/CY7C1329H-133AXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1329H-133AXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C1329H-133AXC, 2Mbit Synchronous SDR SRAM, 64K x 32, 133 MHz clock, 4 ns access time, Parallel interface, 3.15V-3.6V supply, 0°C to 70°C, 100-TQFP (14x20 mm), Tray.","salesMarkdown":"## 2 Mbit synchronous SRAM for high-throughput buffer memory The Infineon CY7C1329H-133AXC is a 2 Mbit synchronous SDR (Single Data Rate) SRAM organized as 64K words by 32 bits. It clocks at 133 MHz with a 4 ns access time, making it suitable for cache memory, network packet buffers, and DSP local storage where deterministic read/write latency matters. The 32-bit wide data bus matches many processor and FPGA local memory interfaces without external muxing. The 133 MHz clock rate supports back-to-back pipelined transactions at 133 million transfers per second on the parallel bus. The 4 ns access time from clock edge to data valid gives the controller a tight but workable setup/hold window at that speed. ## Last Buy — plan the procurement window This means Infineon has announced end-of-life and is accepting final orders for a limited period. Buyers should commit last-time-buy quantities now to cover production through the product's service life. ## 100-TQFP footprint and supply rails","metaTitle":"Infineon CY7C1329H-133AXC 2Mbit Synchronous SRAM, 133 MHz","metaDescription":"Infineon CY7C1329H-133AXC 2Mbit (64K x 32) synchronous SDR SRAM with 4 ns access time, 133 MHz clock, 100-TQFP. Request quote.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Last Buy","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, SDR","Access Time":"4 ns","Memory Size":"2Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Last Time Buy","Clock Frequency":"133 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.15V ~ 3.6V","Base Product Number":"CY7C1329","Memory Organization":"64K x 32","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"100-TQFP (14x20)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$6.5649","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/2ca384b0dcaca028fb9f0a62d0f44f93.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1329H-133AXC/alternatives.json"},"ai":{"faq":[{"question":"Is CY7C1329H-133AXC obsolete or end-of-life?","answer":"Yes, this part is in Last Buy status. Plan last-time-buy quantities now to cover your production needs."},{"question":"What is the replacement for CY7C1329H-133AXC?","answer":"For new designs, consider a pin-compatible synchronous SRAM from another supplier in the same 100-TQFP footprint, or a bridge FPGA if the application can absorb the latency. Verify the clock speed, access time, and supply voltage match your bus timing."},{"question":"What is the access time of CY7C1329H-133AXC?","answer":"The access time is 4 ns from clock edge to data valid, at a 133 MHz clock rate. This supports pipelined transactions at 133 million transfers per second on the 32-bit parallel bus."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1329H-133AXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1329H-133AXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}