{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C131-25JXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C131-25JXC","canonicalUrl":"https://icboms.com/infineon/CY7C131-25JXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C131-25JXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C131-25JXC SRAM, Dual Port, Asynchronous, 8Kbit (1K x 8), 25 ns access, 4.5V ~ 5.5V, 52-LCC (J-Lead), Tray.","salesMarkdown":"## 8Kbit dual-port async SRAM in 52-PLCC The CY7C131-25JXC is an 8Kbit dual-port asynchronous SRAM from Infineon, organized as 1K x 8 bits. The dual-port architecture allows two independent systems or controllers to read from and write to the same memory array simultaneously, with arbitration logic handling access contention. With a 25 ns access time and matching 25 ns write cycle time, this part suits moderate-speed shared-memory applications where both ports need deterministic latency. The parallel interface keeps the bus simple — no serial protocol overhead, just address, data, and control lines. The commercial temperature grade (0°C to 70°C) limits it to indoor, climate-controlled environments; not rated for extended industrial or automotive ambient ranges. Housed in a 52-lead PLCC (J-Lead) package, the 19.13 mm x 19.13 mm body is a through-hole-reflow-friendly footprint. The J-leads offer good board-level reliability under thermal cycling, and the package is hand-solderable with a fine-tip iron — a plus for prototyping or low-volume repair work. Infineon lists the CY7C131-25JXC as obsolete. No official successor part number is recorded. Because this is a legacy dual-port SRAM with no direct pin-compatible replacement from Infineon, a board redesign may be required if supply runs dry. Sourcing through independent distribution provides a bridge for sustaining production while a migration plan is developed.","metaTitle":"CY7C131-25JXC Infineon SRAM, 8Kbit, 25 ns, 52-PLCC","metaDescription":"CY7C131-25JXC Infineon dual-port async SRAM, 8Kbit (1K x 8), 25 ns access, 4.5-5.5 V, 52-PLCC. Obsolete — sourced to order against RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"25 ns","Memory Size":"8Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"52-LCC (J-Lead)","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C131","Memory Organization":"1K x 8","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"52-PLCC (19.13x19.13)","Write Cycle Time - Word, Page":"25ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/4525bc76605bfaec121d3b7d6a8f362d.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What package does the CY7C131-25JXC use?","answer":"It comes in a 52-lead PLCC (J-Lead) package, also referred to as 52-LCC, with a 19.13 mm x 19.13 mm body. The J-leads are surface-mount but can be hand-soldered with care."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C131-25JXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C131-25JXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T01:57:43.306Z","lastPublished":"2026-07-21T01:57:43.306Z","indexable":true}}