{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1265KV18-550BZC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1265KV18-550BZC","canonicalUrl":"https://icboms.com/infineon/CY7C1265KV18-550BZC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1265KV18-550BZC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C1265KV18-550BZC, QDR II+ synchronous SRAM, 36Mbit (1M x 36), 550 MHz clock, 1.7V–1.9V supply, 165-FBGA (13x15 mm), 0°C–70°C commercial temp, parallel interface, surface mount, tray.","salesMarkdown":"## 36 Mbit QDR II+ SRAM at 550 MHz — what the clock rate buys you The 550 MHz clock rate means the device delivers back-to-back read and write transactions at double data rate — each clock edge transfers a 36-bit word, so the peak bandwidth sits well above what a single-data-rate SRAM can sustain. This matters when the FPGA or ASIC on the other side of the bus needs to fill a large cache line without inserting dead cycles for bus turnaround. ## Supply rail and temperature grade — where this part fits If the system lives in a climate-controlled rack or lab bench, the temp grade is fine; anything with an ambient above 70°C needs a wider-range variant. The device comes in a 165-ball FBGA measuring 13x15 mm (supplier device package 165-FBGA). That is a fine-pitch BGA — expect 1.0 mm ball pitch typical for this ball count and body size. The board needs a via-in-pad or microvia process for routing the 36-bit data bus plus address and control lines. The shipping medium is tray, not tape-and-reel, so factor that into the pick-and-place feeder setup.","metaTitle":"Infineon CY7C1265KV18-550BZC QDR II+ SRAM, 36Mbit, 550 MHz","metaDescription":"Infineon CY7C1265KV18-550BZC is a 36Mbit synchronous QDR II+ SRAM with 550 MHz clock, 1.7V–1.9V supply, 165-FBGA. Active lifecycle.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, QDR II+","Memory Size":"36Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Product Status":"Active","Clock Frequency":"550 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"1.7V ~ 1.9V","Base Product Number":"CY7C1265","Memory Organization":"1M x 36","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"165-FBGA (13x15)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$100.1000","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/277b6dff6a1b6061a2b90de843d6cc80.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1265KV18-550BZC/alternatives.json"},"ai":{"faq":[{"question":"What is the clock speed of CY7C1265KV18-550BZC?","answer":"The clock frequency is 550 MHz, operating at double data rate for the QDR II+ interface."},{"question":"What is the memory configuration of CY7C1265KV18-550BZC?","answer":"The memory is organized as 1M x 36 bits, for a total of 36 Mbits."},{"question":"Is CY7C1265KV18-550BZC RoHS compliant?","answer":"The part is listed as RoHS compliant per its commercial specification."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1265KV18-550BZC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1265KV18-550BZC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}