{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1250KV18-400BZI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1250KV18-400BZI","canonicalUrl":"https://icboms.com/infineon/CY7C1250KV18-400BZI","factsUrl":"https://icboms.com/api/mcp/products/CY7C1250KV18-400BZI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C1250KV18-400BZI, 36Mbit Synchronous DDR II+ SRAM, 1M x 36, 400 MHz, Parallel, 1.7V ~ 1.9V, -40°C ~ 85°C, 165-LBGA, Tray.","salesMarkdown":"It is a volatile memory device intended for high-bandwidth data buffering and cache applications where the processor or ASIC needs a wide, fast local store without the refresh overhead of DRAM. The DDR II+ interface clocks data on both edges of the 400 MHz input clock, giving an effective data rate of 800 MT/s per pin. The 400 MHz clock frequency is the part's headline performance spec. In a DDR II+ SRAM, this means the data bus toggles at 800 MHz effective rate, delivering a peak bandwidth of 3.2 GB/s on the 36-bit-wide data bus. For a system architect, this clock rate sets the timing closure target on the PCB: the trace length matching and signal integrity budget must hold at sub-nanosecond skew between the clock, address, and data lines. The part is designed for source-synchronous operation, so the read clock (CQ) is forwarded with the data, which relaxes the board-level hold-time margin compared to a common-clock scheme. The I/O supply (VDDQ) is separate and typically runs at the same 1.8 V level, though the part also supports 1.5 V I/O for lower-swing interfaces.","metaTitle":"CY7C1250KV18-400BZI 36Mbit DDR II+ SRAM, 400 MHz, 165-LBGA","metaDescription":"Infineon CY7C1250KV18-400BZI 36Mbit synchronous DDR II+ SRAM, 1M x 36, 400 MHz clock, 1.7V-1.9V supply, -40°C to 85°C, 165-LBGA.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, DDR II+","Memory Size":"36Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Product Status":"Obsolete","Clock Frequency":"400 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"1.7V ~ 1.9V","Base Product Number":"CY7C1250","Memory Organization":"1M x 36","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"165-FBGA (13x15)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$53.3300","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/ceeec61a9e1dc91f71fd8c91bc561737.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1250KV18-400BZI/alternatives.json"},"ai":{"faq":[{"question":"Where can I buy CY7C1250KV18-400BZI?","answer":"This part is obsolete from the manufacturer and is sourced through independent distribution."},{"question":"What is the replacement for CY7C1250KV18-400BZI?","answer":"No official replacement part number is documented for this device. The CY7C1250KV18-400BZI is a specific density (36 Mbit), organization (1M x 36), and package (165-LBGA) variant within the DDR II+ family. A pin-compatible cross-reference is not listed in the available records. For a drop-in substitute, buyers should verify the exact footprint and timing parameters against any candidate part."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1250KV18-400BZI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1250KV18-400BZI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}