{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1245KV18-400BZXC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1245KV18-400BZXC","canonicalUrl":"https://icboms.com/infineon/CY7C1245KV18-400BZXC","factsUrl":"https://icboms.com/api/mcp/products/CY7C1245KV18-400BZXC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C1245KV18-400BZXC, 36Mbit Synchronous QDR II+ SRAM, 400 MHz clock, 1M x 36 organization, 1.7V–1.9V supply, Parallel interface, 165-FBGA (13x15 mm), 0°C–70°C, Tray.","salesMarkdown":"It clocks at 400 MHz and is organized as 1M x 36, meaning each access moves 36 bits in parallel. This part is designed for high-throughput data buffers: network packet processors, search engines, and DSP pipelines where back-to-back reads and writes saturate a traditional shared-bus SRAM. The 400 MHz clock rate means the memory interface toggles at 400 MT/s per pin on the read and write ports independently. ## Package reality — 165-ball FBGA, no socket The CY7C1245KV18-400BZXC comes in a 165-ball FBGA — 13 mm × 15 mm body, 1.0 mm ball pitch. That is a hand-solderable pitch with a hot-air rework station, but not socketable. The supplier device package is 165-FBGA (13x15). The tray shipping medium means parts arrive in a JEDEC tray, not tape-and-reel; plan for pick-and-place nozzle changeover if the line is set up for tape feeders. That is a standard commercial range. If your ambient floor drops below freezing — outdoor telecom cabinets, unheated enclosures, cold-chain logistics — this part will not meet the datasheet specification below 0°C. The storage temperature range is not given, but the operating range is the binding constraint for production shipments.","metaTitle":"Infineon CY7C1245KV18-400BZXC 36Mbit QDR II+ SRAM, 400 MHz","metaDescription":"Infineon CY7C1245KV18-400BZXC 36Mbit synchronous QDR II+ SRAM, 400 MHz clock, 1M x 36 organization, 1.7V–1.9V supply, 165-FBGA, 0°C–70°C.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Synchronous, QDR II+","Memory Size":"36Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"165-LBGA","Product Status":"Active","Clock Frequency":"400 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"1.7V ~ 1.9V","Base Product Number":"CY7C1245","Memory Organization":"1M x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"165-FBGA (13x15)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$67.0700","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/bf3a174c1b905396449675453f994890.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1245KV18-400BZXC/alternatives.json"},"ai":{"faq":[{"question":"What is the clock frequency of CY7C1245KV18-400BZXC?","answer":"The clock frequency is 400 MHz. This is a synchronous QDR II+ SRAM, so the data rate per pin is 400 MT/s on each of the read and write ports independently."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1245KV18-400BZXC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1245KV18-400BZXC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}