{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1061G-10ZXI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1061G-10ZXI","canonicalUrl":"https://icboms.com/infineon/CY7C1061G-10ZXI","factsUrl":"https://icboms.com/api/mcp/products/CY7C1061G-10ZXI","rawCanonicalId":null},"summary":{"shortDescription":"Cypress CY7C1061G-10ZXI, 16Mbit asynchronous SRAM, 1M x 16 parallel organization, 10 ns access time, 4.5–5.5V supply, 48-TFSOP (48-TSOP I) package, -40°C to 85°C operating temperature, Tray.","salesMarkdown":"That access-time figure is the one that decides whether your memory controller can do back-to-back reads at full clock rate or needs to stall. It comes in a 48-TFSOP (18.40 mm width) package, also known as 48-TSOP I, a standard footprint for this density class. ## Industrial temperature range — where it lives The 10 ns write-cycle time (word and page) matches the read access, so the bus timing budget is symmetric — no penalty for mixing read and write transactions. ## Package and rework The Tray shipping medium means the parts arrive aligned in a carrier, not loose in a bag; for hand-assembly or small-batch rework, that saves a sorting step. Listed as Active — no last-time-buy risk, no imminent obsolescence.","metaTitle":"Cypress CY7C1061G-10ZXI 16Mbit Async SRAM, 10 ns, 48-TSOP I","metaDescription":"Cypress CY7C1061G-10ZXI 16Mbit asynchronous SRAM, 1M x 16 parallel, 10 ns access time, 4.5–5.5V, -40°C to 85°C, 48-TSOP I. Active lifecycle.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Asynchronous","Access Time":"10 ns","Memory Size":"16Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"48-TFSOP (0.724\\\", 18.40mm Width)","Product Status":"Active","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C1061","Memory Organization":"1M x 16","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"48-TSOP I","Write Cycle Time - Word, Page":"10ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$38.5000","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/4341c3411ca6312d176c3d75e3399f9d.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1061G-10ZXI/alternatives.json"},"ai":{"faq":[{"question":"What is the access time of CY7C1061G-10ZXI?","answer":"The access time is 10 ns for both read and write cycles (word and page). That is fast enough to feed a 100 MHz bus without wait states."},{"question":"Does CY7C1061G-10ZXI fit a standard 48-TSOP I footprint?","answer":"Yes. The package is a 48-TFSOP (0.724\", 18.40 mm width), also referred to as 48-TSOP I. It is a standard surface-mount footprint for 16Mbit asynchronous SRAMs and is pin-compatible with many other 48-TSOP I parts of the same density and organization."},{"question":"What is the difference between CY7C1061G-10ZXI and CY7C1061G-10ZXC?","answer":"All other specifications — 16Mbit density, 1M x 16 organization, 10 ns access time, 4.5–5.5V supply, 48-TSOP I package — are identical."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1061G-10ZXI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1061G-10ZXI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}