{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C1041CV33-10ZSXAT","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C1041CV33-10ZSXAT","canonicalUrl":"https://icboms.com/infineon/CY7C1041CV33-10ZSXAT","factsUrl":"https://icboms.com/api/mcp/products/CY7C1041CV33-10ZSXAT","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C1041CV33-10ZSXAT asynchronous SRAM, 4Mbit (256K x 16), 10 ns access time, parallel interface, 3V–3.6V supply, -40°C to 85°C, 44-TSOP II, Tape & Reel.","salesMarkdown":"## Active production — no BOM-line risk The CY7C1041CV33-10ZSXAT: For a procurement desk managing a long-running build, this part does not trigger the last-time-buy clock — no need to qualify an alternate solely on lifecycle grounds. ## 10 ns access — timing margin for the bus Rated for a 10 ns access time and a matching 10 ns write-cycle time (word, page), this asynchronous SRAM delivers a 100 MHz equivalent read/write throughput in a parallel interface — the bus timing closure depends on the controller's output hold and setup relative to this window. The 4 Mbit density is organized as 256K x 16, which fits a 16-bit data bus without byte-lane gating — the address range maps directly into a 256K-word memory window. ## 44-TSOP II — footprint and sourcing Housed in a 44-TSOP II (0.400-inch body width, 10.16 mm), the package uses a standard 0.8 mm pitch — the same footprint used by many 4 Mbit and 8 Mbit asynchronous SRAMs, so a board layout designed for one density often accepts the other without a respin. Supplied in Tape & Reel (TR) format, the part is ready for automated pick-and-place assembly — no manual handling required for volume production.","metaTitle":"CY7C1041CV33-10ZSXAT SRAM, 4Mbit, 10 ns, 44-TSOP II","metaDescription":"Infineon CY7C1041CV33-10ZSXAT asynchronous SRAM, 4Mbit (256K x 16), 10 ns access, 3V–3.6V, -40°C to 85°C, 44-TSOP II. Active lifecycle — sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tape & Reel (TR)","Technology":"SRAM - Asynchronous","Access Time":"10 ns","Memory Size":"4Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"44-TSOP (0.400\\\", 10.16mm Width)","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3V ~ 3.6V","Base Product Number":"CY7C1041","Memory Organization":"256K x 16","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"44-TSOP II","Write Cycle Time - Word, Page":"10ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$7.6716","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/9146b31c718f52cb6c0ea7634c968204.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C1041CV33-10ZSXAT/alternatives.json"},"ai":{"faq":[{"question":"What is the memory organization and interface of this SRAM?","answer":"It is organized as 256K x 16 bits (4 Mbit total) with a parallel interface. Access time and write-cycle time are both 10 ns."},{"question":"What package does CY7C1041CV33-10ZSXAT come in?","answer":"It is supplied in Tape & Reel format."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C1041CV33-10ZSXAT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C1041CV33-10ZSXAT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}