{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C09389V-12AXCT","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C09389V-12AXCT","canonicalUrl":"https://icboms.com/infineon/CY7C09389V-12AXCT","factsUrl":"https://icboms.com/api/mcp/products/CY7C09389V-12AXCT","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C09389V-12AXCT, SRAM - Dual Port, Synchronous, 1.152Mbit, 12 ns access, 50 MHz, 100-LQFP, Tape & Reel.","salesMarkdown":"## Obsolete dual-port SRAM — sourcing the CY7C09389V-12AXCT The CY7C09389V-12AXCT from Infineon Technologies is an obsolete dual-port synchronous SRAM, organized 64K x 18, with a 12 ns access time and a 50 MHz clock. The official lifecycle status is Obsolete, meaning the manufacturer has discontinued production. ## Parametric profile — 64K x 18, 12 ns, 50 MHz The 12 ns access time sets the read-cycle floor — the part can deliver data within 12 ns of the address being valid, which is the timing constraint for the bus controller. The 50 MHz clock frequency governs the synchronous write and read operations; at that rate, one word (18 bits) is transferred every 20 ns in a pipelined burst. The 1.152 Mbit density (64K words x 18 bits) is sized for moderate-depth FIFO or mailbox buffers in multiprocessor systems. The dual-port architecture allows two independent controllers to access the same memory array without arbitration logic — each port has its own address, data, and control lines, with the on-chip arbitration handling simultaneous writes to the same address. ## Package and temperature grade The Tape & Reel (TR) packaging is the standard for automated pick-and-place assembly.","metaTitle":"CY7C09389V-12AXCT Infineon SRAM, 1.152Mbit, 12ns, 100-LQFP","metaDescription":"CY7C09389V-12AXCT Infineon dual-port synchronous SRAM, 1.152Mbit, 12ns access, 50MHz, 100-TQFP. Obsolete, sourced to order against RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tape & Reel (TR)","Technology":"SRAM - Dual Port, Synchronous","Access Time":"12 ns","Memory Size":"1.152Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Obsolete","Clock Frequency":"50 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3V ~ 3.6V","Base Product Number":"CY7C09389","Memory Organization":"64K x 18","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"100-TQFP (14x14)","Write Cycle Time - Word, Page":"-"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/677f5a74678690fda2c1c400d603c926.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the memory organization and access time of the CY7C09389V-12AXCT?","answer":"Organized as 64K x 18 bits (1.152 Mbit total), with a 12 ns access time and a 50 MHz clock frequency."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C09389V-12AXCT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C09389V-12AXCT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T01:53:34.708Z","lastPublished":"2026-07-21T01:53:34.708Z","indexable":true}}