{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C038V-20AIKJ","brand":"Cypress Semiconductor Corp","brandSlug":"cypress-semiconductor-corp","productSlug":"CY7C038V-20AIKJ","canonicalUrl":"https://icboms.com/cypress-semiconductor-corp/CY7C038V-20AIKJ","factsUrl":"https://icboms.com/api/mcp/products/CY7C038V-20AIKJ","rawCanonicalId":null},"summary":{"shortDescription":"Cypress CY7C038V-20AIKJ, 1.152Mbit dual-port asynchronous SRAM, 64Kx18 organization, 20ns access time, 3.0–3.6V supply, 100-TQFP (14x14mm), -40°C to 85°C, bulk package.","salesMarkdown":"In a shared-memory design, that 20 ns window must fit within the bus cycle of both ports. If one port runs at a faster clock, the 20 ns part may force a wait state — the 10 ns siblings (CY7C1011DV33-10BVXI, CY7C1021DV33-10BVXIT, CY7C1021DV33-10VXI) are faster but also higher density or different organization, so the trade-off is speed versus memory width and footprint. ## Asynchronous dual-port — no clock, but arbitration matters Asynchronous operation means no clock is needed for the memory core — address transitions trigger the access cycle. That simplifies timing but puts the burden on the design to handle simultaneous port contention. The CY7C038V-20AIKJ includes on-chip arbitration logic (busy flag) to flag collisions; the system must sample that flag and retry the access. For designs that prefer a clocked interface, a synchronous dual-port SRAM would be a different architecture.","metaTitle":"Cypress CY7C038V-20AIKJ Dual-Port SRAM, 1.152Mbit, 20ns","metaDescription":"Cypress CY7C038V-20AIKJ 1.152Mbit dual-port asynchronous SRAM, 64Kx18, 20ns access, 3.0-3.6V, -40°C to 85°C, 100-TQFP. Active lifecycle, available to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"title":"CY7C038V-20AIKJ","Package":"Bulk","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"20 ns","Memory Size":"1.152Mbit","Memory Type":"Volatile","description":"IC SRAM 1.152MBIT PAR 100TQFP","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Memory Interface":"Parallel","Voltage - Supply":"3V ~ 3.6V","Base Product Number":"CY7C038","Memory Organization":"64K x 18","Operating Temperature":"-40°C~85°C(TA)","Supplier Device Package":"100-TQFP (14x14)","Write Cycle Time - Word, Page":"20ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$97.1900","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/e9538dc3b48bcab7e02472f39576c2b4.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C038V-20AIKJ/alternatives.json"},"ai":{"faq":[{"question":"What is the supply voltage range for CY7C038V-20AIKJ?","answer":"The supply voltage range is 3.0 V to 3.6 V, making it suitable for 3.3 V logic systems."},{"question":"Is CY7C038V-20AIKJ a synchronous or asynchronous dual-port SRAM?","answer":"It is an asynchronous dual-port SRAM — no clock is needed for the memory core, but the design must handle port contention via the built-in arbitration logic."},{"question":"What is the operating temperature range of CY7C038V-20AIKJ?","answer":"The operating temperature range is -40°C to 85°C, industrial grade."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/cypress-semiconductor-corp/CY7C038V-20AIKJ","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/cypress-semiconductor-corp/CY7C038V-20AIKJ when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-11T17:20:20.394Z","lastPublished":"2026-07-11T17:20:20.394Z","indexable":true}}