{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C0251AV-25AC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C0251AV-25AC","canonicalUrl":"https://icboms.com/infineon/CY7C0251AV-25AC","factsUrl":"https://icboms.com/api/mcp/products/CY7C0251AV-25AC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C0251AV-25AC dual-port asynchronous SRAM, 144Kbit (8K x 18), 25 ns access time, 3V to 3.6V supply, 100-LQFP surface-mount package, tray.","salesMarkdown":"## Dual-port SRAM for shared-memory arbitration The CY7C0251AV-25AC is a 144Kbit dual-port asynchronous SRAM organized as 8K x 18 — two ports with independent address, data, and control lines let two bus masters read or write the same memory array without external arbitration logic. 25 ns access time means the memory completes a read or write cycle within that window from address valid — the port-to-port arbitration delay (busy flag assertion) adds to this, so the system must budget for both when back-to-back accesses collide. Runs from a single 3V to 3.6V rail, matching 3.3V logic families directly — no external level translator needed for the address or data bus. No pin-compatible direct replacement from Infineon is documented. Supplied in a 100-LQFP package (also designated 100-TQFP, 14x14 mm body) — fine-pitch surface-mount, reworkable with a hot-air nozzle sized for the 14 mm square body. Shipped in tray format — not tape-and-reel, so a pick-and-place line feeding from tray magazines or a tube feeder is needed for volume assembly.","metaTitle":"CY7C0251AV-25AC Infineon SRAM, 144Kbit, 25ns, 100-LQFP","metaDescription":"Infineon CY7C0251AV-25AC dual-port asynchronous SRAM, 144Kbit (8K x 18), 25ns access time, 3V-3.6V, 100-LQFP. Obsolete — sourced to order against RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"25 ns","Memory Size":"144Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3V ~ 3.6V","Base Product Number":"CY7C0251","Memory Organization":"8K x 18","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"100-TQFP (14x14)","Write Cycle Time - Word, Page":"25ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/a3b4c2fc69bfc5618525b86877ed3829.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the memory organization of CY7C0251AV-25AC?","answer":"8K x 18 — 144Kbit total, organized as 8192 words of 18 bits each. The 18-bit word width suits systems that need a parity or ECC bit alongside a 16-bit data bus."},{"question":"What package does CY7C0251AV-25AC come in?","answer":"100-LQFP surface-mount package, also specified as 100-TQFP with a 14x14 mm body. Supplied in tray format."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C0251AV-25AC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C0251AV-25AC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T01:51:48.649Z","lastPublished":"2026-07-21T01:51:48.649Z","indexable":true}}