{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C025-25JC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C025-25JC","canonicalUrl":"https://icboms.com/infineon/CY7C025-25JC","factsUrl":"https://icboms.com/api/mcp/products/CY7C025-25JC","rawCanonicalId":null},"summary":{"shortDescription":"Cypress CY7C025-25JC, Dual-Port Asynchronous SRAM, 128Kbit (8K x 16), 25 ns access time, Parallel interface, 4.5V–5.5V supply, 0°C–70°C, 84-PLCC (29.31x29.31), Tube.","salesMarkdown":"The Cypress CY7C025-25JC is a 128Kbit dual-port asynchronous SRAM organized as 8K x 16 bits. It gives two independent systems simultaneous read/write access to a common memory array through separate left and right ports, each with its own address, data, and control lines. The 25 ns access time sets the arbitration latency — both sides must respect the busy flag logic to avoid data corruption when addresses collide. The 25 ns access time means the memory presents valid data within 25 ns of the address being stable on either port. In a dual-processor or FPGA-to-processor mailbox, this sets the minimum cycle time for back-to-back reads. Cypress (now part of Infineon) no longer manufactures this device. For production builds or repair stock, the part must be sourced through independent distribution — surplus, new-old-stock, or qualified broker channels. The 84-PLCC package (29.31 mm x 29.31 mm) is a JEDEC footprint that some newer dual-port SRAMs share, but verify pin compatibility before substituting. Supplied in a Tube, this surface-mount device uses an 84-lead PLCC with J-bend leads (84-LCC). The package body measures 29.31 mm per side. PLCC sockets are available for prototyping, but production boards typically solder directly. The J-lead footprint requires a reflow profile consistent with standard SnPb or Pb-free solders — no special thermal pad or exposed paddle.","metaTitle":"CY7C025-25JC Cypress Dual-Port SRAM, 128Kbit, 25 ns, 84-PLCC","metaDescription":"Cypress CY7C025-25JC dual-port asynchronous SRAM, 128Kbit (8K x 16), 25 ns access, 4.5V–5.5V, 84-PLCC.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tube","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"25 ns","Memory Size":"128Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"84-LCC (J-Lead)","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C025","Memory Organization":"8K x 16","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"84-PLCC (29.31x29.31)","Write Cycle Time - Word, Page":"25ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/24372a262b0fdee4cfbd53405e7a28a5.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is a direct replacement for CY7C025-25JC?","answer":"No official direct replacement is listed in the manufacturer's records. Any pin-compatible dual-port SRAM in an 84-PLCC package must be verified for electrical and timing compatibility — the 25 ns access time and 5V supply are the key constraints."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C025-25JC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C025-25JC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}