{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C0241-15AXCT","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C0241-15AXCT","canonicalUrl":"https://icboms.com/infineon/CY7C0241-15AXCT","factsUrl":"https://icboms.com/api/mcp/products/CY7C0241-15AXCT","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C0241-15AXCT, Dual-Port Asynchronous SRAM, 72Kbit (4K x 18), 15 ns access time, Parallel interface, 4.5V-5.5V supply, 0°C-70°C, 100-TQFP (14x14), Tape & Reel.","salesMarkdown":"The Infineon CY7C0241-15AXCT is a 72Kbit dual-port asynchronous SRAM organized as 4K words by 18 bits. It provides two independent ports with separate address, data, and control lines, allowing simultaneous read/write access from two bus masters without external arbitration logic. Buyers should plan for last-time-buy or lifetime-buy quantities if the program has remaining demand, as supply will only tighten over time. ## Package and temperature grade — design constraints","metaTitle":"CY7C0241-15AXCT Dual-Port SRAM, 72Kbit, 15 ns, 100-TQFP","metaDescription":"Infineon CY7C0241-15AXCT 72Kbit dual-port asynchronous SRAM, 15 ns access time, 4.5V-5.5V, 100-TQFP.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tape & Reel (TR)","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"15 ns","Memory Size":"72Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C0241","Memory Organization":"4K x 18","Operating Temperature":"0°C~70°C(TA)","Supplier Device Package":"100-TQFP (14x14)","Write Cycle Time - Word, Page":"15ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/acb212b00bae884886f16db8e44aa706.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY7C0241-15AXCT/alternatives.json"},"ai":{"faq":[{"question":"Is CY7C0241-15AXCT obsolete?","answer":"Yes, the CY7C0241-15AXCT is listed as obsolete. Infineon has discontinued production. For legacy designs, the part is available through surplus and broker channels."},{"question":"What is the difference between asynchronous and synchronous dual-port SRAM?","answer":"Asynchronous dual-port SRAM, like the CY7C0241-15AXCT, does not require a clock signal for read or write operations — access is controlled by chip enable, output enable, and write enable signals. Synchronous dual-port SRAM uses a clock to latch addresses and data, which can simplify timing closure in high-speed designs but adds clock distribution and setup/hold constraints. For a 15 ns access time part, asynchronous operation is straightforward to interface with most microcontrollers and FPGAs without a dedicated memory controller."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C0241-15AXCT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C0241-15AXCT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}