{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C024-55AC","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C024-55AC","canonicalUrl":"https://icboms.com/infineon/CY7C024-55AC","factsUrl":"https://icboms.com/api/mcp/products/CY7C024-55AC","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY7C024-55AC, 64Kbit (4K x 16) dual-port asynchronous SRAM, 55 ns access time, parallel interface, 4.5V-5.5V supply, 0°C to 70°C, 100-TQFP (14x14), surface mount.","salesMarkdown":"## 55 ns dual-port SRAM for shared-memory arbitration The Infineon CY7C024-55AC is a 64Kbit (organized as 4K x 16) dual-port asynchronous SRAM that gives two independent systems simultaneous read/write access to the same memory array without dead cycles. Not intended for outdoor, under-hood, or unheated enclosures where the die would see temperature excursions outside that range. ## Obsolete — independent distribution is the supply channel Infineon lists the CY7C024-55AC as obsolete. No official successor is published for this exact order code. Sourcing runs through independent distribution — verified stock and pricing are confirmed against an RFQ at quote time. Supplied in a 100-TQFP (14x14 mm) body, surface-mount. The 100-LQFP footprint is standard for this density class — layout engineers should match the land pattern to the supplier device package dimensions. The listed shipping medium is Bag, though actual reel or tray quantities vary by inventory lot.","metaTitle":"CY7C024-55AC Infineon 64Kbit Dual-Port SRAM, 55 ns","metaDescription":"CY7C024-55AC Infineon 64Kbit dual-port asynchronous SRAM, 55 ns access, 4.5V-5.5V, 100-TQFP.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Bag","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"55 ns","Memory Size":"64Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C024","Memory Organization":"4K x 16","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"100-TQFP (14x14)","Write Cycle Time - Word, Page":"55ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/24372a262b0fdee4cfbd53405e7a28a5.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the replacement for CY7C024-55AC?","answer":"Infineon does not list a direct official successor for this exact order code. For a pin-compatible alternative within the same dual-port SRAM family, a buyer would need to evaluate other CY7C024 variants with matching package and supply voltage — but no single drop-in replacement is published. Sourcing the CY7C024-55AC itself through independent distribution is the practical path for existing BOM lines."},{"question":"What is the access time of CY7C024-55AC?","answer":"The access time is 55 ns, which defines the read-cycle window and the minimum write-pulse width for the parallel interface. At 55 ns, this part is suited for bus speeds typical of mid-range 8-bit or 16-bit controllers sharing a memory mailbox."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C024-55AC","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C024-55AC when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}