{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY7C024-25AXI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY7C024-25AXI","canonicalUrl":"https://icboms.com/infineon/CY7C024-25AXI","factsUrl":"https://icboms.com/api/mcp/products/CY7C024-25AXI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY7C024-25AXI SRAM - Dual Port, Asynchronous, 64Kbit (4K x 16), 25 ns access, 4.5V ~ 5.5V, -40°C ~ 85°C, 100-LQFP, Tray.","salesMarkdown":"## 25 ns access and dual-port arbitration The CY7C024-25AXI: The 25 ns access time means the memory completes a read or write cycle within that window from address assertion — critical when two processors or an FPGA and a CPU contend for the same memory space without a shared clock. The write cycle time, word and page, is also 25 ns, so the bus turnaround is symmetric. As a dual-port asynchronous SRAM, it provides two independent ports with separate address, data, and control lines. Each port can access any memory location simultaneously; the internal arbitration logic resolves contention when both ports target the same address, asserting a BUSY flag to the losing port. ## 100-TQFP package and board integration Housed in a 100-TQFP (14x14 mm) package, the CY7C024-25AXI is a surface-mount device. The 0.5 mm pitch demands careful PCB layout — a 4-layer board is typical for fan-out of the 100 pins, with decoupling capacitors placed close to each supply pair to maintain signal integrity at 25 ns edge rates. ## Sourcing an obsolete dual-port SRAM For new designs, consider a more recent dual-port SRAM family with a similar 4K x 16 organization and 5 V supply tolerance, though a board respin to a different package may be required.","metaTitle":"CY7C024-25AXI Infineon SRAM, 64Kbit, 25 ns, 100-TQFP","metaDescription":"Infineon CY7C024-25AXI 64Kbit dual-port asynchronous SRAM, 25 ns access, 4.5-5.5 V, -40 to 85°C, 100-TQFP. Obsolete, sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Obsolete","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Mfr":"Infineon Technologies","Series":"-","Package":"Tray","Technology":"SRAM - Dual Port, Asynchronous","Access Time":"25 ns","Memory Size":"64Kbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Product Status":"Obsolete","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Base Product Number":"CY7C024","Memory Organization":"4K x 16","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"100-TQFP (14x14)","Write Cycle Time - Word, Page":"25ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/24372a262b0fdee4cfbd53405e7a28a5.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the memory organization and access time of the CY7C024-25AXI?","answer":"It is organized as 4K x 16 bits (64Kbit total) with a 25 ns access time and a 25 ns write cycle time for word and page operations."},{"question":"What package does the CY7C024-25AXI use?","answer":"It comes in a 100-TQFP (14x14 mm) surface-mount package, supplied in a tray."},{"question":"How can I order the CY7C024-25AXI or check availability?","answer":"Submit an RFQ with your target quantity. We source this obsolete part through independent distribution and confirm availability, pricing, and lot traceability at quote time."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY7C024-25AXI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY7C024-25AXI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-21T01:51:39.720Z","lastPublished":"2026-07-21T01:51:39.720Z","indexable":true}}