{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY62148DV30LL-55ZSXI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY62148DV30LL-55ZSXI","canonicalUrl":"https://icboms.com/infineon/CY62148DV30LL-55ZSXI","factsUrl":"https://icboms.com/api/mcp/products/CY62148DV30LL-55ZSXI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies MoBL® series, SRAM - Asynchronous, 4Mbit, 512K x 8, Parallel interface, 55 ns access, 2.2V ~ 3.6V, -40°C ~ 85°C, 32-SOIC (0.445\", 11.30mm Width), Surface Mount, Bulk.","salesMarkdown":"## 4 Mbit asynchronous SRAM in a 32-pin SOIC The Infineon CY62148DV30LL-55ZSXI is a 4 Mbit asynchronous SRAM organized as 512K x 8 bits, with a 55 ns access time. It sits in the MoBL® series, a low-power family designed for battery-backed and portable applications where standby current matters. ## 55 ns access and 512K x 8 organization The 55 ns access time means the part can deliver data within 55 ns of a valid address — fast enough for most 8-bit and 16-bit microcontroller buses running at moderate clock rates, but not intended for high-speed cache or DSP scratchpad duty. The 512K x 8 organization (byte-wide) is a natural fit for 8-bit data buses and simplifies PCB routing compared to a x16 part when only byte-wide access is needed. The write cycle time matches the read access at 55 ns, so no wait-state penalty on back-to-back writes. ## Active production, RoHS3 compliant It is fully RoHS3 compliant (2011/65/EU + 2015/863).","metaTitle":"Infineon CY62148DV30LL-55ZSXI SRAM, 4Mbit, 55ns, 32-SOIC","metaDescription":"Infineon MoBL® 4Mbit asynchronous SRAM, 512K x 8, 55 ns access, 2.2-3.6V, -40 to 85°C, 32-SOIC. Active, RoHS3. Request quote.","metaKeywords":null},"attributes":{"series":"MoBL®","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Series":"MoBL®","Package":"Bulk","Technology":"SRAM - Asynchronous","Access Time":"55 ns","Memory Size":"4Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"32-SOIC (0.445\\\", 11.30mm Width)","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"2.2V ~ 3.6V","Memory Organization":"512K x 8","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"32-SOIC","Write Cycle Time - Word, Page":"55ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$2.37","stockQuantity":28,"priceTiers":[{"qty":127,"price":"$2.37000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/92cba6867d6d21fe25c7509ea96cc679.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the memory organization and access time of CY62148DV30LL-55ZSXI?","answer":"It is organized as 512K x 8 bits (4 Mbit total) with a 55 ns access time and a matching 55 ns write cycle time."},{"question":"What compliance documentation does Infineon provide for CY62148DV30LL-55ZSXI?","answer":"The part is RoHS3 compliant (ROHS3). Infineon provides a RoHS certificate and material declaration upon request through the RFQ process."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY62148DV30LL-55ZSXI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY62148DV30LL-55ZSXI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}