{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY62128DV30LL-55ZAIT","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY62128DV30LL-55ZAIT","canonicalUrl":"https://icboms.com/infineon/CY62128DV30LL-55ZAIT","factsUrl":"https://icboms.com/api/mcp/products/CY62128DV30LL-55ZAIT","rawCanonicalId":null},"summary":{"shortDescription":"Infineon MoBL® SRAM, CY62128DV30LL-55ZAIT, 1Mbit (128K x 8), Parallel, 55 ns, 2.2 V, -40°C to 85°C, 32-TSOP.","salesMarkdown":"## MoBL® 1 Mbit SRAM for low-power 8-bit buses The Infineon CY62128DV30LL-55ZAIT is a 1 Mbit (128K x 8) asynchronous SRAM from the MoBL® series, organized for a byte-wide parallel interface. It runs on a 2.2 V supply rail. ## Industrial temperature range — field reliability ## Sourcing — active, no LTB watch needed If the 2.2 V rail is fixed, this is the part; if the system can tolerate 3.0 V, the CY7C1018 is worth a look.","metaTitle":"CY62128DV30LL-55ZAIT SRAM 1Mbit Parallel 55 ns MoBL®","metaDescription":"Infineon CY62128DV30LL-55ZAIT SRAM, 1Mbit (128K x 8), 55 ns access, 2.2 V supply, -40°C to 85°C, TSOP-32.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"series":"MoBL®","has_mpn":"CY62128","frame_size":"1Mbit","Access Time":"55 ns","memory_type":"Volatile","package_type":"Bulk","Memory Format":"SRAM","mounting_type":"Surface Mount","interface_type":"Parallel","product_status":"Active","lifecycle_stage":"eol_hot","supply_voltage_v":"2.2","Memory Organization":"128K x 8","Operating Temperature High":"-40°C to 85°C (TA)","Write Cycle Time - Word, Page":"55ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$2.29","priceTiers":null},"links":{"datasheetUrl":null,"sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CY62128DV30LL-55ZAIT/alternatives.json"},"ai":{"faq":[{"question":"What is the memory organization of CY62128DV30LL-55ZAIT?","answer":"It is organized as 128K words by 8 bits (128K x 8), giving a total of 1 Mbit. The byte-wide interface suits 8-bit microcontrollers and legacy DSP buses."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY62128DV30LL-55ZAIT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY62128DV30LL-55ZAIT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}