{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY62128BNLL-70SXCT","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY62128BNLL-70SXCT","canonicalUrl":"https://icboms.com/infineon/CY62128BNLL-70SXCT","factsUrl":"https://icboms.com/api/mcp/products/CY62128BNLL-70SXCT","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies MoBL® series, CY62128BNLL-70SXCT asynchronous SRAM, 1Mbit (128K x 8), 70 ns access time, 4.5-5.5 V supply, 32-SOIC wide-body package, commercial temperature range.","salesMarkdown":"## Active 5 V asynchronous SRAM for legacy bus designs The CY62128BNLL-70SXCT is an Infineon MoBL® series 1 Mbit asynchronous SRAM organized as 128K x 8 bits, with a 70 ns access time and parallel interface. ## 70 ns access and write cycle timing Both the address-to-data access time and the write cycle time (word, page) are specified at 70 ns. This means the memory can complete a read or write operation within 70 ns of the address or control signal transition, which sets the bus cycle budget for the host controller. In a system running with a 10 MHz bus clock (100 ns cycle), the 70 ns access leaves 30 ns of margin for address decode, data setup, and board-level propagation delay. Designers should verify that the combined timing of the memory controller output delay plus the SRAM access time meets the required data setup window at the receiver. ## Commercial temp grade and 32-SOIC wide-body package It is not qualified for industrial or automotive under-hood duty. The 32-SOIC wide-body package (0.445-inch body width, 11.30 mm) is a JEDEC-standard footprint that reflows on a standard surface-mount line. The wide body allows easier manual rework and inspection compared to finer-pitch packages.","metaTitle":"Infineon CY62128BNLL-70SXCT SRAM, 1Mbit, 70 ns, 32-SOIC","metaDescription":"CY62128BNLL-70SXCT from Infineon MoBL® series: 1Mbit (128K x 8) asynchronous SRAM, 70 ns access, 4.5-5.5 V. Active production, available to order.","metaKeywords":null},"attributes":{"series":"MoBL®","packageCase":null,"mountingType":null,"rohsStatus":"Not applicable","productStatus":"Active","categoryPath":["Interface & Transceivers"],"specifications":{"Series":"MoBL®","Package":"Bulk","Technology":"SRAM - Asynchronous","Access Time":"70 ns","Memory Size":"1Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"32-SOIC (0.445\\\", 11.30mm Width)","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"4.5V ~ 5.5V","Memory Organization":"128K x 8","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"32-SOIC","Write Cycle Time - Word, Page":"70ns"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$0.95","stockQuantity":27,"priceTiers":[{"qty":317,"price":"$0.95000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/ad31f9962c616f61b7953f352ae22a26.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the closest functional alternative to CY62128BNLL-70SXCT?","answer":"It operates at 4.5 V and comes in a 32-TSOP II package, so the footprint differs from the 32-SOIC of the CY62128BNLL-70SXCT."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY62128BNLL-70SXCT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY62128BNLL-70SXCT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}