{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY2CC910OIT","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY2CC910OIT","canonicalUrl":"https://icboms.com/infineon/CY2CC910OIT","factsUrl":"https://icboms.com/api/mcp/products/CY2CC910OIT","rawCanonicalId":null},"summary":{"shortDescription":"Infineon (Cypress) CY2CC910OIT, Fanout Buffer (Distribution), 1:10 ratio, 650 MHz max, AVCMOS input/output, 1.71V-3.3V supply, -40°C to 85°C, 20-SSOP package, Surface Mount.","salesMarkdown":"## 650 MHz 1:10 low-skew clock distribution The Infineon (Cypress) CY2CC910OIT is a 1:10 fanout buffer designed to distribute a single AVCMOS clock input to ten outputs with low skew. It handles clock frequencies up to 650 MHz, making it suitable for high-speed timing distribution in telecom, networking, and data-communications equipment where maintaining signal integrity across multiple branches matters. The part operates from a 1.71V to 3.3V supply range, with additional narrower windows of 2.375V to 3.3V and 3.135V to 3.3V, giving flexibility when interfacing with different logic families. The input and output are both single-ended AVCMOS — no differential signaling — so it fits designs using standard CMOS clock sources rather than LVPECL or LVDS. ## What the supply voltage ranges mean for your BOM The CY2CC910OIT lists three overlapping supply ranges: 1.71V to 3.3V, 2.375V to 3.3V, and 3.135V to 3.3V. This is not a mistake — it reflects the device's ability to operate across different voltage domains depending on the input signal swing and output load. The widest range (1.71V to 3.3V) covers low-voltage cores down to 1.8V logic, while the tighter windows ensure proper switching thresholds at higher supply levels. For a BOM running a 3.3V clock tree, any of the three ranges works; for a 1.8V I/O bank, only the 1.71V to 3.3V window applies. Plan the supply rail accordingly and confirm the input voltage meets the AVCMOS thresholds at your chosen VDD. The 20-SSOP package (0.209\" body width, 5.30 mm) is a surface-mount footprint common in moderate-density designs. ## Lifecycle and compliance note If your assembly line requires RoHS-10 exemption or full lead-free processing, verify the exemption status or look for a lead-free variant suffix. For defense, aerospace, or high-reliability applications where leaded finish is preferred, this is actually an advantage.","metaTitle":"CY2CC910OIT Fanout Buffer, 650 MHz, 1:10, 20-SSOP","metaDescription":"CY2CC910OIT low skew clock driver from Infineon (Cypress). 1:10 fanout buffer, 650 MHz max, AVCMOS I/O, 1.71V-3.3V supply, -40°C to 85°C, 20-SSOP.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"RoHS non-compliant","productStatus":"Active","categoryPath":["Analog & Data Acquisition"],"specifications":{"Type":"Fanout Buffer (Distribution)","Input":"AVCMOS","Output":"AVCMOS","Package":"Bulk","Mounting Type":"Surface Mount","Package / Case":"20-SSOP (0.209\\\", 5.30mm Width)","Frequency - Max":"650 MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"1.71V ~ 3.3V, 2.375V ~ 3.3V, 3.135V ~ 3.3V","Number of Circuits":"1","Ratio - Input:Output":"1:10","Operating Temperature":"-40°C ~ 85°C","Supplier Device Package":"20-SSOP","Differential - Input:Output":"No/No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$2.07","stockQuantity":0,"priceTiers":[{"qty":145,"price":"$2.07000","currency":"USD"}]},"links":{"datasheetUrl":"https://rocelec.widen.net/view/pdf/3rnhoz3u0y/CYPRS06929-1.pdf?t.download=true&u=5oefqw","sourceUrl":null},"ai":{"faq":[{"question":"Does CY2CC910OIT support differential inputs?","answer":"No. The CY2CC910OIT has single-ended AVCMOS input and output only — differential input and output are both marked \"No/No\". It is not compatible with LVPECL, LVDS, or HCSL clock sources without external level translation."},{"question":"How many outputs does CY2CC910OIT provide?","answer":"The CY2CC910OIT provides ten outputs from a single input, for a 1:10 fanout ratio. This is a single-circuit device (one buffer channel) driving all ten outputs."},{"question":"What is the maximum frequency of CY2CC910OIT?","answer":"The CY2CC910OIT supports clock frequencies up to 650 MHz maximum. This is the upper limit for the AVCMOS input; actual achievable frequency depends on supply voltage, load capacitance, and signal integrity on the PCB."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY2CC910OIT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY2CC910OIT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}