{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY29658AI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY29658AI","canonicalUrl":"https://icboms.com/infineon/CY29658AI","factsUrl":"https://icboms.com/api/mcp/products/CY29658AI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY29658AI Zero Delay Buffer, PLL-based clock driver, LVPECL input, LVCMOS outputs, 1:10 fanout, 200 MHz max, 32-TQFP (7x7), -40°C to 85°C, dual supply 2.375V–2.625V / 3.135V–3.465V","salesMarkdown":"## Zero delay buffer with LVPECL input and 1:10 LVCMOS fanout The CY29658AI is a PLL-based zero delay buffer from Infineon that accepts a single LVPECL input and distributes it to ten LVCMOS outputs with matched edge placement. The 200 MHz maximum frequency covers most FPGA, ASIC, and processor clock trees in telecom, networking, and industrial control equipment. ## Supply flexibility and temperature grade Operates from either a 2.5V rail (2.375V to 2.625V) or a 3.3V rail (3.135V to 3.465V), letting the same BOM position serve designs with different core voltages. ## Package and footprint for layout planning Housed in a 32-TQFP with a 7x7 mm body (supplier device package 32-TQFP (7x7)). The 0.80 mm pitch is routable on a four-layer board without blind vias; the exposed pad (if present) should be stitched to ground plane with at least nine thermal vias to keep the PLL junction temperature within spec. ## Lifecycle and compliance posture The part is RoHS non-compliant, so designs destined for EU or similar markets may need an exemption or a lead-free alternative.","metaTitle":"CY29658AI Zero Delay Buffer – Infineon, LVPECL Input","metaDescription":"Infineon CY29658AI Zero Delay Buffer, LVPECL input, LVCMOS output, 1:10 fanout, 200 MHz max, industrial temp, 32-TQFP. Active lifecycle, RoHS non-compliant.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"RoHS non-compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"Type":"Zero Delay Buffer","Input":"LVPECL","Output":"LVCMOS","Package":"Bulk","Mounting Type":"Surface Mount","Package / Case":"32-TQFP","Frequency - Max":"200 MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"2.375V ~ 2.625V, 3.135V ~ 3.465V","Number of Circuits":"1","Ratio - Input:Output":"1:10","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"32-TQFP (7x7)","Differential - Input:Output":"Yes/No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$5.14","stockQuantity":0,"priceTiers":[{"qty":59,"price":"$5.14000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/136479a786b005f6bfe9f44cb0141f8f.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the input and output logic of CY29658AI?","answer":"The input is LVPECL (differential) and the outputs are single-ended LVCMOS. The input:output ratio is 1:10."},{"question":"Is CY29658AI RoHS compliant?","answer":"No, it is listed as RoHS non-compliant. Verify your market's exemption rules or consider a lead-free alternative if required."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY29658AI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY29658AI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}