{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY29350AI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY29350AI","canonicalUrl":"https://icboms.com/infineon/CY29350AI","factsUrl":"https://icboms.com/api/mcp/products/CY29350AI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies CY29350AI clock driver, PLL Yes with Bypass, 200 MHz max, LVCMOS output, 32-TQFP, surface mount, industrial temp.","salesMarkdown":"## PLL with bypass — glitch-free clock switching The CY29350AI integrates a PLL with a bypass path, meaning the output can switch between a multiplied clock and a clean feed-through of the reference without re-lock transients — useful when a system must fall back to a free-running oscillator during PLL failure or test mode. ## 200 MHz fan-out, 2:9 ratio Rated for a maximum output frequency of 200 MHz, this clock driver accepts LVCMOS or LVTTL inputs and delivers nine LVCMOS outputs from two input lines — a 2:9 fan-out that suits distributing a master clock to multiple ASICs or FPGAs on a single board. ## 32-TQFP — layout and sourcing The 0.8 mm pitch fan-outs on two-layer boards without microvias, and the exposed paddle (if present) should be tied to the ground plane for thermal relief.","metaTitle":"Infineon CY29350AI Clock Driver, 200 MHz, 32-TQFP","metaDescription":"Active Infineon CY29350AI clock driver with PLL bypass, 200 MHz max, 2:9 fan-out, -40°C to 85°C. 32-TQFP. Quoted to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"RoHS non-compliant","productStatus":"Active","categoryPath":["Analog & Data Acquisition"],"specifications":{"PLL":"Yes with Bypass","Type":"Clock Driver","Input":"LVCMOS, LVTTL","Output":"LVCMOS","Package":"Bulk","Mounting Type":"Surface Mount","Package / Case":"32-TQFP","Frequency - Max":"200MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"2.375V ~ 3.465V","Divider/Multiplier":"Yes/No","Number of Circuits":"1","Ratio - Input:Output":"2:9","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"32-TQFP (7x7)","Differential - Input:Output":"No/No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$4.96","stockQuantity":0,"priceTiers":[{"qty":61,"price":"$4.96000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/75576a0ccc882531b377940ededd82bd.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What does the PLL with bypass mean for system design?","answer":"The bypass path lets the clock driver output the input reference directly, bypassing the PLL multiplication. This allows a glitch-free switch to a known-good clock source if the PLL loses lock, or during board-level test when a clean reference is needed."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY29350AI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY29350AI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}