{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY28341OC-2","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY28341OC-2","canonicalUrl":"https://icboms.com/infineon/CY28341OC-2","factsUrl":"https://icboms.com/api/mcp/products/CY28341OC-2","rawCanonicalId":null},"summary":{"shortDescription":"Cypress CY28341OC-2 PLL clock buffer, 200 MHz max, 1:20 input:output ratio, differential outputs, 56-SSOP, 0°C to 70°C, RoHS non-compliant.","salesMarkdown":"## What this PLL clock buffer does for a DDR board The CY28341OC-2 is a PLL-based clock buffer from Cypress, built to take a single crystal input and fan it out to 20 clock outputs at up to 200 MHz. It is aimed squarely at DDR memory clock trees — the 1:20 ratio means one crystal reference can feed the whole DIMM slot array without daisy-chaining a second buffer. Outputs are differential (No/Yes on the input/output side), which is what DDR interfaces expect for clean edge rates and low jitter on the rising edge. ## Temperature range and where it fits Rated 0°C to 70°C, this is a commercial-temperature part. It belongs in a desktop motherboard, a server blade, or a telecom line card in a conditioned room — not in an engine bay, a rooftop enclosure, or a factory floor without climate control. If your BOM calls for industrial temp, this is not the part. ## Package and mounting 56-pin SSOP, 7.50 mm body width, surface-mount. The 0.295-inch-wide footprint is standard for this density. Orientation is marked by pin 1 chamfer on the package — no ambiguity on a pick-and-place line or a rework station. No special handling beyond normal ESD precautions. ## Lifecycle and sourcing reality Listed as Active in production. It is RoHS non-compliant.","metaTitle":"CY28341OC-2 PLL Clock Buffer, 200 MHz, 1:20, DDR, 56-SSOP","metaDescription":"CY28341OC-2 PLL clock buffer for DDR chipsets. 200 MHz max, 1:20 fanout, differential outputs. Active production.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"RoHS non-compliant","productStatus":"Active","categoryPath":["Discrete Semiconductors"],"specifications":{"PLL":"Yes","Input":"Crystal","Output":"Clock","Package":"Bulk","Main Purpose":"DDR","Mounting Type":"Surface Mount","Package / Case":"56-BSSOP (0.295\\\", 7.50mm Width)","Frequency - Max":"200MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"2.375V ~ 2.375V, 3.135V ~ 3.135V","Number of Circuits":"2","Ratio - Input:Output":"1:20","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"56-SSOP","Differential - Input:Output":"No/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$3.13","stockQuantity":0,"priceTiers":[{"qty":96,"price":"$3.13000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/a1684699f1d5a59345c53b5058f11b5b.pdf","sourceUrl":null},"ai":{"faq":[{"question":"Is CY28341OC-2 compatible with VIA P4 chipset?","answer":"The description lists it as a frequency timing generator for VIA P4 chipsets. It is designed to generate the clock signals required by that chipset family."},{"question":"What is the max frequency of CY28341OC-2?","answer":"The maximum output frequency is 200 MHz, which covers DDR-200, DDR-266, and DDR-333 memory clock rates."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY28341OC-2","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY28341OC-2 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}