{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY2509ZC-1","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY2509ZC-1","canonicalUrl":"https://icboms.com/infineon/CY2509ZC-1","factsUrl":"https://icboms.com/api/mcp/products/CY2509ZC-1","rawCanonicalId":null},"summary":{"shortDescription":"Infineon Technologies Spread Aware™ Zero Delay Buffer, PLL-based, 140 MHz max, 2.97V–3.63V supply, 2:10 LVCMOS/LVTTL I/O, 24-TSSOP, 0°C to 70°C.","salesMarkdown":"## What this clock buffer does on the board The CY2509ZC-1 is a PLL-based Zero Delay Buffer — it takes one or two LVCMOS/LVTTL reference inputs and regenerates ten outputs with edge alignment that cancels the propagation delay through the device. The PLL locks to the input frequency up to 140 MHz, so the output edges arrive at the same phase as the input, not delayed by the buffer's internal path. That deskew matters when you are distributing a clock across multiple loads on a dense digital board and cannot afford a static phase offset between the source and each destination. The \"Spread Aware\" series designation means the PLL tracks a spread-spectrum modulated input clock without losing lock — the loop bandwidth is wide enough to follow the modulation. If your system uses SSC to reduce EMI on the reference, this buffer passes that modulation through to the fanout outputs instead of filtering it out. ## Package and footprint fit Housed in a 24-TSSOP (4.40 mm body width), supplier device package 24-TSSOP. The 0.65 mm pin pitch on a TSSOP-24 fans out cleanly on a two-layer board — no via-in-pad or microvia needed. The supply operates from 2.97 V to 3.63 V, which covers 3.3 V nominal rails with margin for ripple. Confirm the board's 3.3 V rail stays within that window under load; the PLL's phase noise degrades if the supply droops below 2.97 V. ## Lifecycle and compliance note The part is RoHS non-compliant, which means the leads and internal plating contain lead. For RoHS-required builds, verify whether your assembly house accepts a non-compliant part under a customer-directed waiver, or evaluate a lead-free alternative in the same functional family. ## Sourcing posture Active and available through the authorized channel. We source against the BOM quantity per RFQ — no stock-holding claim, no immediate-ship promise. The 24-TSSOP package is a standard Infineon footprint; date-code and lot traceability are confirmed at order. If you need a second-source evaluation, the CY2305SXI-1HT covers a subset of the fanout at a lower max frequency and wider temperature range — compare the full parametric table before committing.","metaTitle":"CY2509ZC-1 Zero Delay Buffer PLL 140 MHz 24-TSSOP Infineon","metaDescription":"CY2509ZC-1 Zero Delay Buffer with PLL, 140 MHz max, 2:10 I/O, 24-TSSOP, 0°C to 70°C. Active production. RoHS non-compliant. Sourced per RFQ.","metaKeywords":null},"attributes":{"series":"Spread Aware™","packageCase":null,"mountingType":null,"rohsStatus":"RoHS non-compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"PLL":"Yes","Type":"Zero Delay Buffer","Input":"LVCMOS, LVTTL","Output":"LVCMOS, LVTTL","Series":"Spread Aware™","Package":"Bulk","Mounting Type":"Surface Mount","Package / Case":"24-TSSOP (0.173\\\", 4.40mm Width)","Frequency - Max":"140MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"2.97V ~ 3.63V","Divider/Multiplier":"No/No","Number of Circuits":"1","Ratio - Input:Output":"2:10","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"24-TSSOP","Differential - Input:Output":"No/No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$0.97","stockQuantity":0,"priceTiers":[{"qty":311,"price":"$0.97000","currency":"USD"}]},"links":{"datasheetUrl":"https://rocelec.widen.net/view/pdf/6w2qf81819/CYPRS07053-1.pdf?t.download=true&u=5oefqw","sourceUrl":null},"ai":{"faq":[{"question":"What is the maximum frequency the CY2509ZC-1 can buffer?","answer":"140 MHz. That is the upper limit for the PLL to lock and the outputs to maintain specified skew and jitter. Running above 140 MHz risks loss of lock and undefined output phase."},{"question":"Does the CY2509ZC-1 support spread-spectrum clocking for EMI reduction?","answer":"Yes — the Spread Aware™ series is designed to track a spread-spectrum modulated input. The PLL loop bandwidth accommodates the modulation frequency range typical of SSC, so the output fanout preserves the EMI-reducing spread rather than filtering it out."},{"question":"Is the CY2509ZC-1 RoHS compliant?","answer":"No — it is listed as RoHS non-compliant. The device contains lead in the solder finish or internal metallization. Confirm your assembly's RoHS exemption policy before ordering."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY2509ZC-1","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY2509ZC-1 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}