{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CY23FP12OI","brand":"Infineon Technologies","brandSlug":"infineon","productSlug":"CY23FP12OI","canonicalUrl":"https://icboms.com/infineon/CY23FP12OI","factsUrl":"https://icboms.com/api/mcp/products/CY23FP12OI","rawCanonicalId":null},"summary":{"shortDescription":"Infineon CY23FP12OI, PLL-based fanout buffer / zero-delay buffer, 2:12 LVCMOS distribution, 200 MHz max, industrial -40°C to 85°C, 28-SSOP surface-mount package.","salesMarkdown":"## 2:12 fanout buffer with on-chip PLL The CY23FP12OI integrates a phase-locked loop to regenerate a clean clock from a single LVCMOS or LVTTL input and distribute it across twelve LVCMOS outputs — no external PLL components needed on the board. Maximum output frequency is 200 MHz, which covers most DDR, Ethernet, and FPGA reference clock trees without requiring a separate high-speed fanout device. ## Supply flexibility and output count The 2:12 input-to-output ratio is the standout spec: two independent input pins feed twelve outputs, giving a fanout density that a 1:5 part like the CY2305SXI-1HT cannot match without multiple devices. All I/O are single-ended LVCMOS — no differential signalling — so the part is a direct drop-in for legacy or cost-sensitive boards where CML or LVPECL would add BOM cost. ## Active production — no LTB pressure The 28-SSOP package is a standard Infineon footprint, so supply should track mainstream production volumes. RoHS non-compliant — if your assembly line is RoHS-only, factor a waiver or look for a lead-free variant. The part is quoted to order against your BOM quantity. ## Package and footprint checklist 28-SSOP (0.209-inch body width, 5.30 mm height) — surface-mount only. One PLL circuit on die, no divider on the feedback path (multiplier=Yes, divider=No). The zero-delay architecture locks the output edges to the input with near-zero skew — critical for synchronous interfaces where setup/hold margin is tight.","metaTitle":"CY23FP12OI PLL Clock Fanout Buffer – 200 MHz, 2:12","metaDescription":"Infineon CY23FP12OI PLL-based zero-delay fanout buffer: 2:12 ratio, 200 MHz max, LVCMOS I/O, industrial -40°C to 85°C. Active production, 28-SSOP.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"RoHS non-compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"PLL":"Yes","Type":"Fanout Buffer (Distribution), Zero Delay Buffer","Input":"LVCMOS, LVTTL","Output":"LVCMOS","Package":"Bulk","Mounting Type":"Surface Mount","Package / Case":"28-SSOP (0.209\\\", 5.30mm Width)","Frequency - Max":"200MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"2.375V ~ 2.625V, 3.135V ~ 3.465V","Divider/Multiplier":"Yes/No","Number of Circuits":"1","Ratio - Input:Output":"2:12","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"28-SSOP","Differential - Input:Output":"No/No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$5.01","stockQuantity":0,"priceTiers":[{"qty":60,"price":"$5.01000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/b5e0d8ceefaeff39587c6ee85b941347.pdf","sourceUrl":null},"ai":{"faq":[],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/infineon/CY23FP12OI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/infineon/CY23FP12OI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}