{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CDCU877RHAT","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"CDCU877RHAT","canonicalUrl":"https://icboms.com/texas-instruments/CDCU877RHAT","factsUrl":"https://icboms.com/api/mcp/products/CDCU877RHAT","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments CDCU877RHAT, PLL clock driver, DDR2 memory, 400 MHz max, 1:10 input:output, SSTL-18 I/O, 1.7V–1.9V supply, -40°C to 85°C, 40-VQFN (6x6) surface mount.","salesMarkdown":"## PLL clock driver for DDR2 — what it does and where it fits The Texas Instruments CDCU877RHAT is a 1.8V PLL clock driver designed specifically for DDR2 memory systems. It takes one differential SSTL-18 reference clock and fans it out to ten differential outputs, all running at up to 400 MHz. The part lives in a 40-pin VQFN package (6x6 mm) and operates across the industrial temperature range of -40°C to 85°C, so it handles telecom racks, industrial controllers, and outdoor base stations — not just server DIMMs. ## 1:10 fanout and 400 MHz — what the ratings mean for the bus The 1:10 ratio means one clean reference clock from the chipset or oscillator can feed ten DDR2 loads — typically multiple DIMM slots or a mix of memory and controller. At 400 MHz the PLL keeps output-to-output skew tight enough to hold the DDR2 setup-and-hold window across the whole bank. Both input and output are differential SSTL-18, so the part mates directly to DDR2 DRAM and chipset clock pins without level translation. ## Industrial temperature and active lifecycle The -40°C to 85°C rating covers the industrial temperature range. The part is Active and RoHS3 compliant.","metaTitle":"TI CDCU877RHAT PLL Clock Driver, 400 MHz, DDR2, 40-VQFN","metaDescription":"TI CDCU877RHAT PLL clock driver for DDR2 memory. 400 MHz max, 1:10 fanout, SSTL-18 I/O, -40 to 85°C. Active, RoHS3.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"PLL":"Yes","Input":"SSTL-18","Output":"SSTL-18","Package":"Tape & Reel (TR); Cut Tape (CT)","Main Purpose":"Memory, DDR2","Mounting Type":"Surface Mount","Package / Case":"40-VFQFN Exposed Pad","Frequency - Max":"400MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"1.7V ~ 1.9V","Number of Circuits":"1","Ratio - Input:Output":"1:10","Operating Temperature":"-40°C ~ 85°C","Supplier Device Package":"40-VQFN (6x6)","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$9.59","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$9.59000","currency":"USD"},{"qty":10,"price":"$8.66700","currency":"USD"},{"qty":25,"price":"$8.26360","currency":"USD"},{"qty":100,"price":"$7.17520","currency":"USD"},{"qty":250,"price":"$7.26388","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/d96fd61cec8d2a4d76fab90bb46ac3a9.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the function of CDCU877RHAT?","answer":"It is a PLL clock driver for DDR2 memory. It takes one differential SSTL-18 input clock and distributes it to ten differential outputs at up to 400 MHz, providing the low-jitter reference clocks needed by DDR2 DRAM and memory controllers."},{"question":"Is CDCU877RHAT compatible with DDR2 memory?","answer":"Yes, the part is specified for DDR2 memory clock distribution. Its SSTL-18 I/O levels and 400 MHz maximum frequency match the DDR2-800/1066 bus timing requirements."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/CDCU877RHAT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/CDCU877RHAT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-14T00:00:29.682Z","lastPublished":"2026-07-14T00:00:29.682Z","indexable":true}}