{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CDCEL925PW","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"CDCEL925PW","canonicalUrl":"https://icboms.com/texas-instruments/CDCEL925PW","factsUrl":"https://icboms.com/api/mcp/products/CDCEL925PW","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments CDCEL925PW clock/frequency synthesizer, PLL with bypass, 230 MHz max, 1:5 LVCMOS I/O, 1.7V-1.9V supply, -40°C to 85°C, 16-TSSOP.","salesMarkdown":"## Clock synthesis for multi-domain boards The CDCEL925PW: The integrated PLL includes a bypass mode — when bypassed, the input clock passes directly to the outputs, useful for system test or low-jitter paths where the PLL's phase noise is undesirable. The 1:5 input-to-output ratio means one reference clock feeds five independent clock domains, each programmable via the device's serial interface. This suits boards where a single oscillator must drive multiple ICs — an FPGA core clock, a DDR memory reference, and a gigabit Ethernet PHY, for example — without adding separate crystal cans for each rail. ## Supply and temperature constraints for the BOM If your board uses 2.5V or 3.3V for the clock generator, you will need a local LDO.","metaTitle":"Texas Instruments CDCEL925PW Clock Synthesizer, 230MHz","metaDescription":"Texas Instruments CDCEL925PW clock/frequency synthesizer with PLL bypass, 230MHz max, 1:5 ratio, LVCMOS I/O, -40°C to 85°C, 16-TSSOP. Active, ROHS3.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"Mfr":"Texas Instruments","PLL":"Yes with Bypass","Type":"Clock/Frequency Synthesizer","Input":"LVCMOS, Crystal","Output":"LVCMOS","Series":"-","Package":"Tube","Mounting Type":"Surface Mount","Package / Case":"16-TSSOP (0.173\\\", 4.40mm Width)","Product Status":"Active","Frequency - Max":"230MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"1.7V ~ 1.9V","Divider/Multiplier":"Yes/No","Number of Circuits":"1","Base Product Number":"CDCEL925","Ratio - Input:Output":"1:5","Operating Temperature":"-40°C~85°C","Supplier Device Package":"16-TSSOP","Differential - Input:Output":"No/No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$5.3400","priceTiers":[{"qty":1,"price":"$5.34000","currency":"USD"},{"qty":10,"price":"$4.79600","currency":"USD"},{"qty":25,"price":"$4.53400","currency":"USD"},{"qty":100,"price":"$3.92940","currency":"USD"},{"qty":250,"price":"$3.72788","currency":"USD"},{"qty":500,"price":"$3.34500","currency":"USD"},{"qty":1000,"price":"$2.85150","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/be8521534c767230e8bb7fab0995b101.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CDCEL925PW/alternatives.json"},"ai":{"faq":[{"question":"What is the PLL bypass feature on the CDCEL925PW?","answer":"The PLL bypass mode routes the input clock directly to the outputs without frequency synthesis. This is useful for system test, low-jitter paths, or when the input frequency already matches the required output frequency and the PLL's phase noise or lock time is undesirable."},{"question":"What compliance documentation does TI provide for CDCEL925PW?","answer":"The CDCEL925PW is ROHS3 compliant. Texas Instruments provides the standard RoHS certificate of compliance and material declaration. No UL, IEC, or REACH documentation is listed in the product record."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/CDCEL925PW","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/CDCEL925PW when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}