{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CDCE72010RGCTG4","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"CDCE72010RGCTG4","canonicalUrl":"https://icboms.com/texas-instruments/CDCE72010RGCTG4","factsUrl":"https://icboms.com/api/mcp/products/CDCE72010RGCTG4","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments CDCE72010RGCTG4, Clock Synchronizer / Fanout Distribution / Jitter Cleaner, PLL Yes, 1.5 GHz max, 3:20 input:output, LVCMOS/LVDS/LVPECL, 64-VFQFN, -40 to 85°C.","salesMarkdown":"## What this clock IC does and who needs it The Texas Instruments CDCE72010RGCTG4 is a clock synchronizer, fanout distribution buffer, and jitter cleaner in one device — the kind of part a system architect reaches for when a board has multiple clock domains that must stay phase-aligned and low-noise. It integrates a PLL, accepts up to three reference inputs (LVCMOS, LVDS, or LVPECL), and drives up to twenty outputs in the same signal formats. ## 1.5 GHz ceiling and what it buys you The maximum output frequency hits 1.5 GHz, which covers the fastest serial links in telecom backhaul, data converters, and FPGA transceiver reference clocks. At that speed, the PLL's jitter cleaning matters more than raw frequency — the part filters phase noise from a noisy VCXO or system clock before fanning it out to twenty destinations. ## I/O flexibility saves board space Both inputs and outputs support LVCMOS, LVDS, and LVPECL levels, so the same chip can bridge a single-ended reference to a differential clock tree or distribute LVPECL to multiple LVDS loads without external translators. The 3:20 ratio means one clean input can feed twenty receivers — useful when every FPGA or ADC on the board needs its own low-jitter clock.","metaTitle":"CDCE72010RGCTG4 Clock Synchronizer, Jitter Cleaner, 1.5 GHz","metaDescription":"TI CDCE72010RGCTG4 clock synchronizer, fanout distribution, jitter cleaner. 1.5 GHz max frequency, PLL, LVCMOS/LVDS/LVPECL I/O. Active, industrial temp.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"Mfr":"Texas Instruments","PLL":"Yes","Type":"Clock Synchronizer, Fanout (Distribution), Jitter Cleaner","Input":"LVCMOS, LVDS, LVPECL","Output":"LVCMOS, LVDS, LVPECL","Series":"-","Package":"Tape & Reel (TR)","Mounting Type":"Surface Mount","Package / Case":"64-VFQFN Exposed Pad","Frequency - Max":"1.5GHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3V ~ 3.6V","Divider/Multiplier":"Yes/No","Number of Circuits":"1","Base Product Number":"CDCE72010","Ratio - Input:Output":"3:20","Operating Temperature":"-40°C~85°C","Supplier Device Package":"64-VQFN (9x9)","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":null,"stockQuantity":0,"priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/7075720f51dea855ca4b573d769bd4a1.pdf","sourceUrl":null},"ai":{"faq":[{"question":"Is CDCE72010RGCTG4 obsolete or active?","answer":"Active. It remains a current-production part suitable for new designs."},{"question":"What is the maximum frequency for CDCE72010RGCTG4?","answer":"The maximum output frequency is 1.5 GHz. This covers high-speed serial links, FPGA transceiver reference clocks, and data converter clocking."},{"question":"Does CDCE72010RGCTG4 support differential output?","answer":"Yes. The outputs support LVDS and LVPECL differential standards, in addition to single-ended LVCMOS."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/CDCE72010RGCTG4","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/CDCE72010RGCTG4 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}