{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"CDCE431YS","brand":"Texas Instruments","brandSlug":"texas-instruments","productSlug":"CDCE431YS","canonicalUrl":"https://icboms.com/texas-instruments/CDCE431YS","factsUrl":"https://icboms.com/api/mcp/products/CDCE431YS","rawCanonicalId":null},"summary":{"shortDescription":"Texas Instruments CDCE431YS Clock Generator, PLL Yes, 1.2 GHz max, LVDS/LVPECL outputs, LVCMOS/Crystal input, Die, Wafersale.","salesMarkdown":"## 1.2 GHz differential clock source in bare-die form The CDCE431YS is a single-PLL clock generator from Texas Instruments that accepts an LVCMOS or crystal reference and delivers a differential LVDS or LVPECL output at up to 1.2 GHz. This is a bare-die device supplied in wafer-sale form (die-level procurement), not a packaged IC. The die sits directly on the substrate in a chip-on-board or multi-chip module assembly — the board-level interconnect is wire-bond or flip-chip, not a soldered QFN or BGA footprint. ## What the 1.2 GHz ceiling and differential outputs mean for your clock tree The 1.2 GHz maximum output frequency covers the reference clock rates for 10 GbE SERDES, PCIe Gen 3/4, and 12 Gbps backplane transceivers. The LVDS or LVPECL output swing is the standard interface for FPGA high-speed transceiver banks and ASIC reference clock inputs — no external level translation between the clock source and the load. The integrated PLL synthesizes the output frequency from the input reference without an external VCXO or SAW filter. The divider/multiplier block (Yes/No) means the feedback divider is programmable, but there is no separate output multiplier stage — the output frequency is a multiple of the reference set by the PLL feedback divider alone. ## Die-level procurement — what changes in assembly and test The CDCE431YS ships as a bare die on a wafer (Wafersale package). There is no lead frame, no molded body, and no standard footprint — the die attach pad, bond-pad layout, and wire-bond diagram must come from the TI die datasheet, not from a package outline drawing. The assembly house needs the die map and bond-pad coordinates to design the substrate bond fingers. The die itself sees the same thermal environment as the substrate — the junction temperature is set by the die-attach thermal conductivity and the substrate copper spread, not by a package RθJA. ## Active lifecycle — no end-of-life watch needed The base product number CDCE431 is the family anchor for application notes, IBIS models, and die-level documentation.","metaTitle":"CDCE431YS TI Clock Generator, 1.2 GHz, LVDS/LVPECL, Die","metaDescription":"Texas Instruments CDCE431YS clock generator IC with integrated PLL, 1.2 GHz max output, LVDS/LVPECL differential outputs, die form.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"Mfr":"Texas Instruments","PLL":"Yes","Type":"Clock Generator","Input":"LVCMOS, Crystal","Output":"LVDS, LVPECL","Series":"-","Package":"Bulk","Mounting Type":"Surface Mount","Package / Case":"Die","Product Status":"Active","Frequency - Max":"1.2GHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3V ~ 3.6V","Divider/Multiplier":"Yes/No","Number of Circuits":"1","Base Product Number":"CDCE431","Ratio - Input:Output":"1:1","Operating Temperature":"-40°C~85°C","Supplier Device Package":"Wafersale","Differential - Input:Output":"No/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$12.0798","priceTiers":null},"links":{"datasheetUrl":"https://cdn.icboms.com/fa4543dc050335413935de35d69fce49.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/CDCE431YS/alternatives.json"},"ai":{"faq":[{"question":"What is the closest pin-compatible alternative to CDCE431YS in this Clock & Timing ICs family?","answer":"The base product number CDCE431 is the sole active variant in this die-level form factor."},{"question":"What is CDCE431YS's listed PLL (Yes) on this Clock & Timing ICs line?","answer":"The CDCE431YS integrates a phase-locked loop (PLL) for frequency synthesis and jitter cleaning. The PLL accepts an LVCMOS or crystal reference and generates a differential LVDS or LVPECL output up to 1.2 GHz."},{"question":"What is CDCE431YS's listed type (Clock Generator) on this Clock & Timing ICs line?","answer":"The CDCE431YS is classified as a Clock Generator — it synthesizes a new output frequency from an input reference using the integrated PLL, rather than simply buffering or dividing an existing clock."},{"question":"What compliance documentation does Texas Instruments provide for CDCE431YS (RoHS, REACH, UL, IEC)?","answer":"Texas Instruments provides RoHS and REACH compliance documentation for the CDCE431YS die. The die itself carries no UL or IEC component-level certification — those apply to the assembled module, not the bare semiconductor."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/texas-instruments/CDCE431YS","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/texas-instruments/CDCE431YS when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}