{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"ATF750CL-15SU","brand":"Microchip Technology","brandSlug":"microchip","productSlug":"ATF750CL-15SU","canonicalUrl":"https://icboms.com/microchip/ATF750CL-15SU","factsUrl":"https://icboms.com/api/mcp/products/ATF750CL-15SU","rawCanonicalId":null},"summary":{"shortDescription":"Microchip Technology ATF750C(L) series EE PLD, ATF750CL-15SU, 10 macrocells, 15 ns tpd, 10 I/O, 24-SOIC (0.295\", 7.50mm Width), Tube, Surface Mount.","salesMarkdown":"## 10 macrocells, 15 ns — the glue-logic workhorse The ATF750CL-15SU is a 5V EE PLD from Microchip's ATF750C(L) series, packing 10 macrocells in a 24-SOIC package. With a 15 ns propagation delay (tpd) ceiling, it handles address decoding, state machines, and bus-interface logic where a handful of 7400-series gates would have consumed board space and added propagation skew. ## Speed, temperature, and the repair-bench reality The 15 ns tpd max sets the system clock ceiling — at that delay, the part can decode addresses or sequence a state machine at up to roughly 66 MHz before the internal logic path eats into setup/hold margins. Supply voltage is 4.5V to 5.5V — a straight 5V rail, so no level translation needed when the rest of the board runs on legacy 5V logic. The 10 I/O pins map directly to the 10 macrocells; each I/O can be registered or combinatorial, configured as input, output, or bidirectional. ## Package and board-fit — 24-SOIC wide-body The 24-SOIC (0.295\", 7.50mm Width) wide-body footprint is a standard JEDEC outline — the same pad pattern used by 24-pin SOIC serial EEPROMs and octal bus transceivers. Surface-mount, so it reflows on the same profile as the rest of the board. Shipped in Tube — not tape-and-reel, so it's a hand-place or tube-fed pick-and-place job.","metaTitle":"Microchip ATF750CL-15SU CPLD, 10 macrocells, 15ns, 24-SOIC","metaDescription":"Microchip ATF750CL-15SU EE PLD, 10 macrocells, 15 ns tpd, 10 I/O, 4.5-5.5V, -40 to +85°C. Active production, ROHS3. Sourced to order.","metaKeywords":null},"attributes":{"series":"ATF750C(L)","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Discrete Semiconductors"],"specifications":{"Series":"ATF750C(L)","Package":"Tube","Mounting Type":"Surface Mount","Number of I/O":"10","Package / Case":"24-SOIC (0.295\\\", 7.50mm Width)","lifecycle_stage":"eol_hot","Programmable Type":"EE PLD","Number of Macrocells":"10","Delay Time tpd(1) Max":"15 ns","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"24-SOIC","Voltage Supply - Internal":"4.5V ~ 5.5V"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$4.24","priceTiers":[{"qty":1,"price":"$4.24000","currency":"USD"},{"qty":25,"price":"$4.21520","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/693771ebb2b93044e0e3518c7fea462c.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/ATF750CL-15SU/alternatives.json"},"ai":{"faq":[{"question":"What is the propagation delay and why does it matter?","answer":"The ATF750CL-15SU has a 15 ns max tpd. This is the time from a registered input clock edge to a valid output — it sets the fastest clock the part can track in a state machine or the decode latency in an address path. For a 66 MHz bus, the 15 ns delay leaves about 1 ns of margin after setup/hold; faster designs need the 10 ns or 7 ns speed grades in the same family."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/microchip/ATF750CL-15SU","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/microchip/ATF750CL-15SU when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}