{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"9DBL411BGLFT","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"9DBL411BGLFT","canonicalUrl":"https://icboms.com/renesas/9DBL411BGLFT","factsUrl":"https://icboms.com/api/mcp/products/9DBL411BGLFT","rawCanonicalId":null},"summary":{"shortDescription":"Renesas Electronics 9DBL411BGLFT differential fanout buffer, 1:4 input-to-output ratio, 150 MHz max frequency, LP-HCSL outputs, 20-TSSOP package.","salesMarkdown":"## 1:4 differential fanout buffer for PCIe and QPI clock distribution The Renesas 9DBL411BGLFT is a 1:4 differential fanout buffer designed to distribute reference clocks for Intel QPI and PCI Express (PCIe) interfaces. It accepts a single HCSL input and delivers four LP-HCSL outputs, maintaining the differential signal integrity required by high-speed serial links. Rated for a maximum frequency of 150 MHz, this buffer sits below the PCIe Gen 1/2/3 reference clock rates — it is sized for the QPI and lower-speed PCIe clock trees where the fanout ratio and output format, not the frequency ceiling, are the selection drivers. ## Signal path and fanout architecture The 1:4 ratio means one input drives four output copies — useful when a single clock source must feed multiple endpoints on the same board without adding separate PLLs per lane. The differential input and output path (Yes/Yes) preserves the common-mode rejection that single-ended distribution loses. Input is HCSL, output is LP-HCSL. LP-HCSL (Low-Power HCSL) reduces the output swing and current draw compared to standard HCSL, which matters when four outputs are active simultaneously on a single 3.0–3.6 V supply rail. The part contains no PLL (PLL: No) — it is a pure fanout buffer. There is no jitter cleaning or frequency synthesis; the output phase noise tracks the input. If the source clock needs cleaning, a PLL-based part like the 9ZXL0851EKKLF or 9ZXL1231EKILF is the correct class. ## Package, supply, and temperature grade Housed in a 20-TSSOP (4.40 mm width) with a 0.65 mm pitch, the footprint is a standard JEDEC MO-153 variant. The supplier device package is also 20-TSSOP, so no alternate package code to track. Renesas lists the 9DBL411BGLFT as Active. ROHS3 compliant per the manufacturer's declaration.","metaTitle":"Renesas 9DBL411BGLFT PCIe fanout buffer, 1:4, 150 MHz","metaDescription":"Active Renesas 9DBL411BGLFT differential fanout buffer, 1:4 ratio, 150 MHz max, LP-HCSL outputs, 20-TSSOP. ROHS3 compliant. Sourced per RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"PLL":"No","Input":"HCSL","Output":"LP-HCSL","Package":"Tape & Reel (TR); Cut Tape (CT)","Main Purpose":"Intel QPI, PCI Express (PCIe)","Mounting Type":"Surface Mount","Package / Case":"20-TSSOP (0.173\\\", 4.40mm Width)","Frequency - Max":"150MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3V ~ 3.6V","Number of Circuits":"1","Ratio - Input:Output":"1:4","Operating Temperature":"0°C ~ 70°C","Supplier Device Package":"20-TSSOP","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$3.88","stockQuantity":19,"priceTiers":[{"qty":1,"price":"$4.07000","currency":"USD"},{"qty":10,"price":"$3.65800","currency":"USD"},{"qty":25,"price":"$3.45840","currency":"USD"},{"qty":100,"price":"$2.99720","currency":"USD"},{"qty":250,"price":"$2.84344","currency":"USD"},{"qty":500,"price":"$2.55142","currency":"USD"},{"qty":1000,"price":"$2.42150","currency":"USD"},{"qty":3000,"price":"$2.42150","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/02f3f9b54c20719fb612bef7ea2d34d6.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the 9DBL411BGLFT's input and output signal type?","answer":"Input is HCSL; output is LP-HCSL. Both paths are differential (Yes/Yes)."},{"question":"Does the 9DBL411BGLFT contain a PLL?","answer":"No. The 9DBL411BGLFT is a pure fanout buffer with no PLL. It does not perform jitter cleaning or frequency synthesis."},{"question":"What is the maximum frequency of the 9DBL411BGLFT?","answer":"150 MHz maximum."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/9DBL411BGLFT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/9DBL411BGLFT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}