{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"9DB102BGLFT","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"9DB102BGLFT","canonicalUrl":"https://icboms.com/renesas/9DB102BGLFT","factsUrl":"https://icboms.com/api/mcp/products/9DB102BGLFT","rawCanonicalId":null},"summary":{"shortDescription":"Renesas Electronics 9DB102BGLFT PCI Express (PCIe) clock buffer, PLL-based zero-delay buffer, 1:2 HCSL fanout, 101 MHz max, 3.3V supply, 20-TSSOP, Tape & Reel.","salesMarkdown":"## PCIe clock distribution — one input, two HCSL outputs The 9DB102BGLFT is a PLL-based zero-delay buffer from Renesas, purpose-built for PCI Express (PCIe) clock trees. It accepts a single differential clock input and delivers two HCSL (High-Speed Current Steering Logic) outputs — the signalling standard PCIe root complexes and endpoints expect on the reference clock pair. The 1:2 fanout ratio means one input drives exactly two output copies. For a motherboard or add-in card that needs to distribute a 100 MHz PCIe reference clock to two devices (e.g., a CPU and a PCH, or a switch and an FPGA), this buffer covers that split without an external PLL or clock generator. ## Supply rail and temperature — commercial-grade constraints The supply range is 3.135 V to 3.465 V — a tight 3.3 V ±5 % window. This rail should be clean and dedicated; sharing it with a switching regulator or a high-current logic bank risks injecting noise into the PLL's VCO, which shows up as cycle-to-cycle jitter on the HCSL outputs. This part is not qualified for industrial (-40 °C to +85 °C) or automotive environments. If the end system sees an unheated enclosure or engine-bay ambient, this buffer is outside its rated envelope. ## Package and board-fit — 20-TSSOP footprint Housed in a 20-TSSOP (4.40 mm width) with 0.65 mm pin pitch. The small footprint keeps the trace length from the buffer to the PCIe slot or endpoint short — important because HCSL edge rates are fast enough that a 1-inch stub on the output can cause reflections that fail the PCIe jitter template. The differential input and outputs are both rated as differential (Yes/Yes per the spec). No single-ended clock conversion is needed on the board — the input pair and each output pair are true differential HCSL. ## Lifecycle and compliance — active, RoHS3, no PCN watch The 20-TSSOP body is MSL-rated per the JEDEC standard; typical MSL for this package family is Level 1 or 2, but the exact floor-life rating should be confirmed from the manufacturer's label on the reel.","metaTitle":"Renesas 9DB102BGLFT PCIe Clock Buffer, 1:2 HCSL, 101 MHz","metaDescription":"Renesas 9DB102BGLFT zero-delay buffer, 1:2 fanout, HCSL outputs, 101 MHz max, 3.3V supply, 20-TSSOP, active production. Sourced per RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"PLL":"Yes","Input":"Clock","Output":"HCSL","Package":"Tape & Reel (TR); Cut Tape (CT)","Main Purpose":"PCI Express (PCIe)","Mounting Type":"Surface Mount","Package / Case":"20-TSSOP (0.173\\\", 4.40mm Width)","Frequency - Max":"101MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3.135V ~ 3.465V","Number of Circuits":"1","Ratio - Input:Output":"1:2","Operating Temperature":"0°C ~ 70°C","Supplier Device Package":"20-TSSOP","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$4.01","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$4.21000","currency":"USD"},{"qty":10,"price":"$3.78400","currency":"USD"},{"qty":25,"price":"$3.57760","currency":"USD"},{"qty":100,"price":"$3.10050","currency":"USD"},{"qty":250,"price":"$2.94152","currency":"USD"},{"qty":500,"price":"$2.63940","currency":"USD"},{"qty":1000,"price":"$2.50500","currency":"USD"},{"qty":3000,"price":"$2.50500","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/7335bed37c5505e7925669acd4fa1369.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the closest functional alternative to 9DB102BGLFT — 9DB803DFLFT?","answer":"The 9DB803DFLFT is a sibling PCIe buffer with the same HCSL output type and commercial temperature grade, but it offers a 1:8 fanout ratio (vs 1:2 on the 9DB102BGLFT) and supports up to 400 MHz. The 9DB102BGLFT is the correct choice when only two output copies are needed and the max frequency is 101 MHz — the 9DB803DFLFT would be oversized for that fanout. The packages differ (20-TSSOP vs 48-TSSOP), so they are not pin-compatible drop-in replacements."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/9DB102BGLFT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/9DB102BGLFT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}