{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"9DB102BGILF","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"9DB102BGILF","canonicalUrl":"https://icboms.com/renesas/9DB102BGILF","factsUrl":"https://icboms.com/api/mcp/products/9DB102BGILF","rawCanonicalId":null},"summary":{"shortDescription":"Renesas Electronics 9DB102BGILF PCI Express (PCIe) clock fanout buffer, PLL Yes, 1:2 HCSL outputs, 101 MHz max, 3.135-3.465 V supply, -40 to 85°C, 20-TSSOP package, Tube.","salesMarkdown":"## PCIe clock distribution with a 1:2 fanout The 9DB102BGILF is a zero-delay clock fanout buffer from Renesas, purpose-built for PCI Express (PCIe) reference clock distribution. It takes a single-ended or differential clock input and regenerates two HCSL (High-Speed Current Steering Logic) outputs — the signalling standard required by PCIe root complexes, switches, and endpoints. The internal PLL locks to the input and aligns the output edges to within a few hundred picoseconds of the input, so downstream devices see a clean, low-jitter clock without the cumulative delay of a simple buffer tree. Maximum output frequency is 101 MHz, which covers the 100 MHz PCIe reference clock for Gen1, Gen2, and Gen3 links. ## Footprint and board-fit details The 0.65 mm pin pitch is routable on a standard 4-layer board without microvias; the centre pad is not an exposed thermal pad, so no special copper flooding is required under the package. Because the outputs are HCSL, the AC-coupling capacitors (typically 0.1 µF) must be placed in series with each output trace close to the source — the PCIe Base Spec requires the DC bias to be blocked at the driver side. The input can accept either a differential or single-ended clock; if a single-ended reference is used, the complementary input pin should be biased at the common-mode voltage per the application note. The device is ROHS3 compliant (lead-free, no exemptions), which covers the current EU RoHS directive and most global environmental regulations. For a BOM that requires a PCIe clock fanout with exactly two outputs, this part is a low-risk, single-source selection. If the design later needs more fanout, the 9ZXL0851EKKLF (1:8, same HCSL output type and industrial temp range) is a pin-compatible upgrade path — but the 9DB102BGILF is the correct fit for a 1:2 requirement and avoids the unused-output termination overhead of a larger fanout part.","metaTitle":"Renesas 9DB102BGILF PCIe Clock Fanout Buffer, 101MHz","metaDescription":"Renesas 9DB102BGILF zero-delay PCIe clock fanout buffer. 1:2 HCSL outputs, 101MHz max, 3.3V supply, -40 to 85°C. Active production, ROHS3. Sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"PLL":"Yes","Input":"Clock","Output":"HCSL","Package":"Tube","Main Purpose":"PCI Express (PCIe)","Mounting Type":"Surface Mount","Package / Case":"20-TSSOP (0.173\\\", 4.40mm Width)","Frequency - Max":"101MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3.135V ~ 3.465V","Number of Circuits":"1","Ratio - Input:Output":"1:2","Operating Temperature":"-40°C ~ 85°C","Supplier Device Package":"20-TSSOP","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$4.71","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$4.94000","currency":"USD"},{"qty":10,"price":"$4.44000","currency":"USD"},{"qty":25,"price":"$4.19760","currency":"USD"},{"qty":100,"price":"$3.63790","currency":"USD"},{"qty":250,"price":"$3.45136","currency":"USD"},{"qty":500,"price":"$3.09690","currency":"USD"},{"qty":1000,"price":"$2.93920","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/7335bed37c5505e7925669acd4fa1369.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the closest functional second-source for 9DB102BGILF?","answer":"The 9ZXL0851EKKLF is a Renesas peer with the same HCSL output type, same supply voltage range, and same industrial temperature grade. The key difference is fanout ratio: 9DB102BGILF provides 1:2 outputs, while 9ZXL0851EKKLF provides 1:8. Both are in 20-TSSOP packages, so the footprint is identical — but the 1:8 part has a 400 MHz maximum frequency versus 101 MHz on the 1:2 part. For a 100 MHz PCIe reference clock with only two loads, the 9DB102BGILF is the correct BOM fit; the 1:8 part would require terminating the six unused outputs."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/9DB102BGILF","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/9DB102BGILF when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}