{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"853S057AGILFT","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"853S057AGILFT","canonicalUrl":"https://icboms.com/renesas/853S057AGILFT","factsUrl":"https://icboms.com/api/mcp/products/853S057AGILFT","rawCanonicalId":null},"summary":{"shortDescription":"Renesas Electronics 853S057AGILFT Clock Multiplexer, 4:1, 3 GHz max, CML/LVDS/LVPECL/SSTL input, ECL/LVPECL output, 20-TSSOP, Tape & Reel.","salesMarkdown":"## 4:1 differential mux at 3 GHz The Renesas 853S057AGILFT is a 4:1 differential clock multiplexer that routes one of four input clock sources to a single output. It handles CML, LVDS, LVPECL, and SSTL input levels and outputs ECL or LVPECL — covering the common high-speed serial clock families found on FPGA reference clocks, SERDES PLLs, and backplane timing cards. The 3 GHz maximum frequency means this part sits comfortably in 10G+ line-card timing trees where the reference clock runs at 156.25 MHz or 312.5 MHz and the mux must pass the edge without adding jitter. The differential input-to-output path (Yes/Yes) preserves the signal integrity through the switch matrix. The surface-mount assembly matches standard reflow profiles; no special handling beyond MSL level typical for TSSOP.","metaTitle":"Renesas 853S057AGILFT 4:1 Mux, 3 GHz, 20-TSSOP","metaDescription":"Renesas 853S057AGILFT 4:1 differential multiplexer, 3 GHz max, CML/LVDS/LVPECL/SSTL input, ECL/LVPECL output, 20-TSSOP, active production, ROHS3.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"Type":"Multiplexer","Input":"CML, LVDS, LVPECL, SSTL","Output":"ECL, LVPECL","Package":"Tape & Reel (TR); Cut Tape (CT)","Mounting Type":"Surface Mount","Package / Case":"20-TSSOP (0.173\\\", 4.40mm Width)","Frequency - Max":"3 GHz","lifecycle_stage":"eol_hot","Voltage - Supply":"2.375V ~ 3.465V","Number of Circuits":"1","Ratio - Input:Output":"4:1","Operating Temperature":"-40°C ~ 85°C","Supplier Device Package":"20-TSSOP","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$9.78","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$9.78000","currency":"USD"},{"qty":10,"price":"$8.83800","currency":"USD"},{"qty":25,"price":"$8.42680","currency":"USD"},{"qty":100,"price":"$7.31700","currency":"USD"},{"qty":250,"price":"$6.98820","currency":"USD"},{"qty":500,"price":"$6.37158","currency":"USD"},{"qty":1000,"price":"$5.54944","currency":"USD"},{"qty":3000,"price":"$5.34391","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/a81020c5ffca3b212444c7b11918ab03.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What input and output standards does the 853S057AGILFT support?","answer":"The input accepts CML, LVDS, LVPECL, and SSTL levels. The output drives ECL or LVPECL. This covers the differential signalling families used on most high-speed clock distribution trees."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/853S057AGILFT","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/853S057AGILFT when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}