{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"82V3911AUG","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"82V3911AUG","canonicalUrl":"https://icboms.com/renesas/82V3911AUG","factsUrl":"https://icboms.com/api/mcp/products/82V3911AUG","rawCanonicalId":null},"summary":{"shortDescription":"Renesas Electronics 82V3911AUG, PLL Yes, 9:9 CMOS/LVDS/PECL I/O, 644.53125 MHz max, 196-CABGA (15x15 mm), -40°C to 85°C, tray.","salesMarkdown":"## PLL for Ethernet and SONET/SDH – 644.53125 MHz ceiling The 82V3911AUG is a single-circuit PLL from Renesas aimed at Ethernet, SONET/SDH, and Stratum timing applications. Its maximum output frequency is 644.53125 MHz.","metaTitle":"82V3911AUG Renesas PLL Clock IC – 644.53125 MHz, 196-CABGA","metaDescription":"Active Renesas PLL for Ethernet/SONET/SDH/Stratum. 9:9 ratio, CMOS/LVDS/PECL I/O, industrial temp -40°C to 85°C, 196-CABGA. Sourced per RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"PLL":"Yes","Input":"CMOS, LVDS, PECL","Output":"CMOS, LVDS, PECL","Package":"Tray","Main Purpose":"Ethernet, SONET/SDH, Stratum","Mounting Type":"Surface Mount","Package / Case":"196-BGA","Frequency - Max":"644.53125MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3.3V","Number of Circuits":"1","Ratio - Input:Output":"9:9","Operating Temperature":"-40°C ~ 85°C","Supplier Device Package":"196-CABGA (15x15)","Differential - Input:Output":"Yes/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$48.81","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$51.23000","currency":"USD"},{"qty":10,"price":"$47.79500","currency":"USD"},{"qty":25,"price":"$45.79200","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/383c4346f34b45263a137516ceb569f3.pdf","sourceUrl":null},"ai":{"faq":[{"question":"Is the 82V3911AUG compatible with LVDS inputs?","answer":"Yes — the input stage accepts CMOS, LVDS, and PECL levels. The same three standards are available on the output. No external level translator is needed when the reference clock is an LVDS oscillator or an FPGA differential output."},{"question":"What is the frequency range of the 82V3911AUG?","answer":"The maximum output frequency is 644.53125 MHz. The datasheet should specify the minimum lock frequency and the loop bandwidth — the evidence does not carry those figures. For Ethernet and SONET/SDH line cards, this ceiling covers 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 156.25 MHz (10GbE reference)."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/82V3911AUG","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/82V3911AUG when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}