{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"74FCT3807ASOGI","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"74FCT3807ASOGI","canonicalUrl":"https://icboms.com/renesas/74FCT3807ASOGI","factsUrl":"https://icboms.com/api/mcp/products/74FCT3807ASOGI","rawCanonicalId":null},"summary":{"shortDescription":"Renesas 74FCT3807ASOGI, 74FCT series, Fanout Buffer (Distribution), 1:10 ratio, 100 MHz max, LVTTL input, CMOS/TTL output, 3V to 3.6V supply, -40°C to 85°C, 20-SOIC.","salesMarkdown":"## Clock fanout for single-ended trees The Renesas 74FCT3807ASOGI is a 1:10 fanout buffer from the 74FCT series, designed to distribute a single LVTTL clock input to ten CMOS or TTL outputs. It runs from a 3V to 3.6V supply rail and handles clock rates up to 100 MHz. The industrial temperature range (-40°C to 85°C) qualifies it for motor drives, telecom line cards, and factory automation controllers. ## 1:10 ratio and 100 MHz ceiling The 1:10 input-to-output ratio means one clock source drives ten loads without needing a second buffer stage. At 100 MHz the part keeps edge rates clean for most single-ended clock trees — think FPGA configuration clocks, Ethernet PHY reference clocks, or synchronous ADC sample clocks. The non-differential I/O (No/No) rules out LVPECL or LVDS fanout; this is strictly for LVTTL/CMOS rails. ## 20-SOIC footprint, surface-mount assembly Housed in a 20-SOIC package (7.50 mm width), the part reflows on standard lead-free profiles. The wide-body SOIC gives good thermal contact to the PCB copper pour — useful if the buffer sits near a hot FPGA or processor. Tube shipment is the default; if your pick-and-place line feeds from tape, confirm the reel option with your distributor before committing the BOM line. ## Active, no LTB watch needed Renesas lists the 74FCT3807ASOGI as Active with ROHS3 compliance. No last-time-buy notice, no end-of-life window to track. For a production BOM that needs a single-ended clock fanout at 3.3V, this part is a stable line item — no urgency to qualify a second source unless your risk policy demands dual sourcing for all active logic.","metaTitle":"74FCT3807ASOGI Fanout Buffer, 1:10, 100 MHz, 20-SOIC","metaDescription":"Renesas 74FCT3807ASOGI fanout buffer (distribution), 1:10 ratio, 100 MHz max, LVTTL input, CMOS/TTL output, -40 to 85°C, 20-SOIC. Active, RoHS3.","metaKeywords":null},"attributes":{"series":"74FCT","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"Type":"Fanout Buffer (Distribution)","Input":"LVTTL","Output":"CMOS, TTL","Series":"74FCT","Package":"Tube","Mounting Type":"Surface Mount","Package / Case":"20-SOIC (0.295\\\", 7.50mm Width)","Frequency - Max":"100 MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3V ~ 3.6V","Number of Circuits":"1","Ratio - Input:Output":"1:10","Operating Temperature":"-40°C ~ 85°C","Supplier Device Package":"20-SOIC","Differential - Input:Output":"No/No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$2.8","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$2.80000","currency":"USD"},{"qty":10,"price":"$2.51600","currency":"USD"},{"qty":25,"price":"$2.37360","currency":"USD"},{"qty":100,"price":"$2.02220","currency":"USD"},{"qty":250,"price":"$1.89880","currency":"USD"},{"qty":500,"price":"$1.66144","currency":"USD"},{"qty":1000,"price":"$1.37663","currency":"USD"},{"qty":2500,"price":"$1.28169","currency":"USD"},{"qty":5000,"price":"$1.23422","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/0891a1aaac541bfdcd74a9a630e27144.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the frequency range of 74FCT3807ASOGI?","answer":"The maximum rated frequency is 100 MHz. This is the ceiling for the clock input — the output edges stay within timing spec up to that rate. For slower clocks (e.g., 25 MHz or 50 MHz) the part works fine with no derating needed."},{"question":"What is 74FCT3807ASOGI's listed input and output type?","answer":"The input is LVTTL; the outputs are CMOS and TTL compatible. The part does not accept differential signals (LVPECL, LVDS) — it is strictly single-ended."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/74FCT3807ASOGI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/74FCT3807ASOGI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}