{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"74ALVT16823DGG,118","brand":"NXP Semiconductors","brandSlug":"nxp","productSlug":"74ALVT16823DGG118","canonicalUrl":"https://icboms.com/nxp/74ALVT16823DGG118","factsUrl":"https://icboms.com/api/mcp/products/74ALVT16823DGG%2C118","rawCanonicalId":null},"summary":{"shortDescription":"NXP Semiconductors 74ALVT series D-Type flip-flop, 74ALVT16823DGG,118, dual 9-bit, positive edge trigger, tri-state non-inverted outputs, 250 MHz clock frequency, 56-TSSOP package.","salesMarkdown":"## Dual 9-bit D-type with 250 MHz clock ceiling The 74ALVT16823DGG,118 is a dual 9-bit D-type flip-flop from NXP's 74ALVT series, with a master reset function and positive-edge triggering. Each element stores nine bits, giving 18 flip-flops in one 56-TSSOP package. Rated for a 250 MHz clock frequency, this part handles high-speed data pipelines where the upstream bus toggles at hundreds of megahertz. The 3.1 ns max propagation delay at 3.3 V, 50 pF load sets the timing budget for the downstream logic — a 250 MHz signal has a 4 ns period, so the 3.1 ns delay leaves roughly 0.9 ns of setup margin before the next clock edge. ## Supply flexibility and output drive The 100 µA quiescent current keeps the static power draw low in clock-gated designs. Outputs source 8 mA (high) and sink 24 mA (low) at the lower voltage range, and 32 mA source / 64 mA sink at 3.3 V. This drive strength is enough to fan out to multiple CMOS loads on a short PCB trace without external buffers. ## Industrial temperature and package The 56-TFSOP (6.10 mm width) and 56-TSSOP supplier package are both surface-mount — the 0.65 mm pitch requires a standard SMT assembly line with no special via-in-pad.","metaTitle":"74ALVT16823DGG,118 NXP 74ALVT D-Type Flip-Flop, 250 MHz","metaDescription":"NXP 74ALVT16823DGG,118 dual 9-bit D-type flip-flop, 250 MHz clock, 3.1 ns propagation delay, 56-TSSOP. Active production, ROHS3 compliant. Quoted to order.","metaKeywords":null},"attributes":{"series":"74ALVT","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Type":"D-Type","Series":"74ALVT","Package":"Bulk","Function":"Master Reset","Output Type":"Tri-State, Non-Inverted","Trigger Type":"Positive Edge","Mounting Type":"Surface Mount","Package / Case":"56-TFSOP (0.240\\\", 6.10mm Width)","Clock Frequency":"250 MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"2.3V ~ 2.7V, 3V ~ 3.6V","Input Capacitance":"3 pF","Number of Elements":"2","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"56-TSSOP","Current - Quiescent (Iq)":"100 µA","Current - Output High, Low":"8mA, 24mA; 32mA, 64mA","Number of Bits per Element":"9","Max Propagation Delay @ V, Max CL":"3.1ns @ 3.3V, 50pF"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$2.93","stockQuantity":28,"priceTiers":[{"qty":103,"price":"$2.93000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/403d066a72176a2231fac939c0346364.pdf","sourceUrl":null},"ai":{"faq":[],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/nxp/74ALVT16823DGG118","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/nxp/74ALVT16823DGG118 when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}