{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"7204L12TPG","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"7204L12TPG","canonicalUrl":"https://icboms.com/renesas/7204L12TPG","factsUrl":"https://icboms.com/api/mcp/products/7204L12TPG","rawCanonicalId":null},"summary":{"shortDescription":"Renesas Electronics 7200 series asynchronous FIFO, 7204L12TPG, 36K (4K x 9) memory, 12ns access time, 50MHz data rate, 28-DIP (0.300\", 7.62mm) through-hole package, tube.","salesMarkdown":"## Asynchronous FIFO with 12 ns access time The Renesas 7204L12TPG is a 36K (4K x 9) asynchronous FIFO from the 7200 series, organized as 4,096 words by 9 bits. Its 12 ns access time and 50 MHz data rate suit it for buffering between asynchronous clock domains in processor and DSP interfaces. The 9-bit width (8 data bits plus a parity/control bit) is typical for byte-wide buses with an extra flag or error-detection lane. Unidirectional data flow and no FWFT or programmable flags mean the read/write control logic is straightforward — the designer manages the empty/full status through the retransmit capability. ## Through-hole DIP for legacy or prototype builds Housed in a 28-pin PDIP (0.300\" body width, 7.62 mm pitch), the 7204L12TPG is a through-hole part. This package is preferred for breadboard prototyping, socketed evaluation, or legacy bus architectures where a surface-mount reflow is impractical. Maximum supply current is 120 mA. The commercial temperature range (0°C to 70°C) covers indoor equipment, test gear, and telecom central-office environments but does not extend to industrial or automotive under-hood duty.","metaTitle":"Renesas 7204L12TPG Async FIFO, 4Kx9, 12ns, 28-DIP","metaDescription":"Renesas 7204L12TPG asynchronous FIFO, 36K (4Kx9), 12ns access time, 50MHz data rate, 28-DIP. Active production, RoHS3. Sourced to order.","metaKeywords":null},"attributes":{"series":"7200","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Microcontrollers & Processors (MCU / MPU / DSP)"],"specifications":{"Series":"7200","Package":"Tube","Function":"Asynchronous","Data Rate":"50MHz","Access Time":"12ns","Memory Size":"36K (4K x 9)","FWFT Support":"No","Mounting Type":"Through Hole","Expansion Type":"Depth, Width","Package / Case":"28-DIP (0.300\\\", 7.62mm)","Bus Directional":"Uni-Directional","lifecycle_stage":"eol_hot","Voltage - Supply":"4.5 V ~ 5.5 V","Operating Temperature":"0°C ~ 70°C","Retransmit Capability":"Yes","Current - Supply (Max)":"120mA","Supplier Device Package":"28-PDIP","Programmable Flags Support":"No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$21.53","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$21.53000","currency":"USD"},{"qty":10,"price":"$20.05100","currency":"USD"},{"qty":25,"price":"$19.83600","currency":"USD"},{"qty":50,"price":"$19.34660","currency":"USD"},{"qty":100,"price":"$18.11950","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/34214e067cc96e932d03b82c74ff3875.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What is the access time and data rate of the 7204L12TPG?","answer":"The 7204L12TPG has a 12 ns access time and supports a 50 MHz data rate. The 12 ns figure is the time from read-enable assertion to valid data on the output bus — the critical timing parameter for interfacing with a processor or ASIC."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/7204L12TPG","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/7204L12TPG when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-22T19:45:10.375Z","lastPublished":"2026-07-22T19:45:10.375Z","indexable":true}}