{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"71V546XS133PFGI","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"71V546XS133PFGI","canonicalUrl":"https://icboms.com/renesas/71V546XS133PFGI","factsUrl":"https://icboms.com/api/mcp/products/71V546XS133PFGI","rawCanonicalId":null},"summary":{"shortDescription":"Renesas 71V546XS133PFGI, Synchronous SDR (ZBT) SRAM, 4.5Mbit (128K x 36), 133 MHz clock, 4.2 ns access, Parallel interface, 3.135V-3.465V supply, 0°C to 70°C, 100-TQFP (14x14), ROHS3.","salesMarkdown":"## Synchronous ZBT SRAM at 133 MHz — what the ratings mean for the bus The Renesas 71V546XS133PFGI is a 4.5 Mbit synchronous SRAM organized as 128K words by 36 bits. It uses a Zero Bus Turnaround (ZBT) pipeline architecture, meaning the memory can switch between read and write cycles without inserting dead cycles — a requirement for high-throughput data buffers in networking, telecom line cards, and test equipment where back-to-back transactions saturate the bus. At 133 MHz the part delivers a 4.2 ns access time from clock edge to data valid. The 100-TQFP (14x14 mm) package is a fine-pitch surface-mount footprint. The part is ROHS3 compliant. ## Commercial temperature range — indoor use only Rated 0°C to 70°C ambient (commercial grade). This limits deployment to temperature-controlled environments. ## Lifecycle and sourcing posture Marked as Active on the lifecycle record. No NRND or last-time-buy flags.","metaTitle":"71V546XS133PFGI Synchronous SRAM, 4.5Mbit, 133 MHz, 4.2 ns","metaDescription":"71V546XS133PFGI from Renesas: 4.5Mbit synchronous SDR ZBT SRAM, 128K x 36, 133 MHz clock, 4.2 ns access, 100-TQFP. Active, ROHS3. Available to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["DC-DC Power Modules"],"specifications":{"Package":"Bulk","Technology":"SRAM - Synchronous, SDR (ZBT)","Access Time":"4.2 ns","Memory Size":"4.5Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Clock Frequency":"133 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.465V","Memory Organization":"128K x 36","Operating Temperature":"0°C ~ 70°C (TA)","Supplier Device Package":"100-TQFP (14x14)"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$1.66","stockQuantity":0,"priceTiers":[{"qty":181,"price":"$1.66000","currency":"USD"}]},"links":{"datasheetUrl":"https://rocelec.widen.net/view/pdf/cohferqarr/IDTIS08344-1.pdf?t.download=true&u=5oefqw","sourceUrl":null},"ai":{"faq":[{"question":"What is the access time of 71V546XS133PFGI?","answer":"The access time is 4.2 ns from clock edge to data valid, measured at the rated 133 MHz clock frequency. This timing drives the bus margin for the host FPGA or ASIC."},{"question":"What is 71V546XS133PFGI's listed technology?","answer":"Synchronous SRAM with Zero Bus Turnaround (ZBT) and Single Data Rate (SDR) pipeline. The ZBT architecture eliminates dead cycles when switching between read and write, sustaining full bus utilization at 133 MHz."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/71V546XS133PFGI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/71V546XS133PFGI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-13T23:34:18.200Z","lastPublished":"2026-07-13T23:34:18.200Z","indexable":true}}