{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"71V3556S133PFGI","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"71V3556S133PFGI","canonicalUrl":"https://icboms.com/renesas/71V3556S133PFGI","factsUrl":"https://icboms.com/api/mcp/products/71V3556S133PFGI","rawCanonicalId":null},"summary":{"shortDescription":"SRAM - Synchronous, SDR (ZBT), 4.5Mbit (128K x 36), Parallel interface, 133 MHz, 4.2 ns access, 3.135V-3.465V, -40°C to 85°C, 100-TQFP (14x14), Bulk.","salesMarkdown":"## ZBT synchronous SRAM for high-throughput data paths The 71V3556S133PFGI is a 4.5 Mbit synchronous SRAM organized as 128K x 36 bits, using Zero Bus Turnaround (ZBT) architecture to eliminate dead cycles between read and write operations on a shared data bus. Rated for a 133 MHz clock with a 4.2 ns access time, this part sustains back-to-back transactions at full bus speed — the ZBT protocol means the bus never idles during direction changes, which matters for cache-tag or packet-buffer applications where every cycle counts. ## Supply rails, temperature grade, and package fit Operates from a 3.135 V to 3.465 V core supply — a standard 3.3 V rail with 5 % margin covers the full range. The industrial temperature grade (-40°C to +85°C) qualifies it for outdoor telecom, base-station line cards, and factory-floor controllers where ambient heat or cold-soak is a given. Housed in a 100-TQFP (14x14 mm) package with a 0.5 mm pitch. The footprint is common across the 71V3556 family, so a board layout validated for a slower speed grade accepts this 133 MHz variant without a respin — confirm the decoupling cap placement for the faster edge rates.","metaTitle":"71V3556S133PFGI SRAM, 4.5Mbit, 133 MHz, 4.2 ns, 100-TQFP","metaDescription":"71V3556S133PFGI ZBT synchronous SRAM, 128Kx36, 133 MHz clock, 4.2 ns access, 3.3V, -40°C to 85°C, 100-TQFP. Active production, sourced per RFQ.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":null,"productStatus":"Active","categoryPath":["Discrete Semiconductors"],"specifications":{"Package":"Bulk","Technology":"SRAM - Synchronous, SDR (ZBT)","Access Time":"4.2 ns","Memory Size":"4.5Mbit","Memory Type":"Volatile","Memory Format":"SRAM","Mounting Type":"Surface Mount","Package / Case":"100-LQFP","Clock Frequency":"133 MHz","lifecycle_stage":"eol_hot","Memory Interface":"Parallel","Voltage - Supply":"3.135V ~ 3.465V","Memory Organization":"128K x 36","Operating Temperature":"-40°C ~ 85°C (TA)","Supplier Device Package":"100-TQFP (14x14)"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$5.4","priceTiers":[{"qty":56,"price":"$5.40000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/f215e63550592a192ce1bb04318c59ff.pdf","sourceUrl":null,"alternativesUrl":"https://icboms.com/api/mcp/products/71V3556S133PFGI/alternatives.json"},"ai":{"faq":[{"question":"What is the memory organization and interface of the 71V3556S133PFGI?","answer":"It is organized as 128K words by 36 bits (4.5 Mbit total) with a parallel interface. The 36-bit word width suits systems that combine 32-bit data with parity or ECC bits in a single device."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/71V3556S133PFGI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/71V3556S133PFGI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-08-11T15:49:49.435Z","lastPublished":"2026-08-11T15:49:49.435Z","indexable":true}}