{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"67C4033-10N","brand":"AMD (Xilinx)","brandSlug":"amd-xilinx","productSlug":"67C4033-10N","canonicalUrl":"https://icboms.com/amd-xilinx/67C4033-10N","factsUrl":"https://icboms.com/api/mcp/products/67C4033-10N","rawCanonicalId":null},"summary":{"shortDescription":"67C4033-10N, asynchronous FIFO, 64 x 5 memory depth, 10 MHz data rate, 4.5 V ~ 5.5 V supply, 35 mA max supply current, 0°C ~ 70°C operating temperature, through-hole 20-DIP package.","salesMarkdown":"## What this FIFO does and where it fits The 67C4033-10N is an asynchronous FIFO memory with a 64-word by 5-bit organization, designed for narrow-width data buffering in 5 V logic systems. Its 10 MHz data rate supports moderate-speed data transfers between asynchronous clock domains, such as between a slow peripheral and a faster bus. The 64 x 5 depth suits applications like keyboard scan buffers, printer interface staging, or low-resolution ADC data capture where only a few dozen words need temporary storage. The through-hole 20-DIP package fits legacy PCB layouts and prototyping boards. ## Expansion and cascading The 67C4033-10N supports expansion in both depth and width, meaning multiple devices can be cascaded to create larger FIFO arrays. For depth expansion, connect the full-flag output of one device to the write-enable of the next; for width expansion, parallel the control signals across multiple chips. No FWFT (First-Word Fall-Through) or programmable flags are supported, so the flag timing is fixed and must be accounted for in the controller logic. ## Package and mounting Supplied in a 20-pin DIP package (20-DIP body, 20-PDIP footprint), through-hole mounting only. The bulk packaging means parts ship in tubes or trays, not tape-and-reel — plan for manual insertion or wave-solder assembly. Store in dry conditions; the DIP body is not moisture-sensitive but bulk handling can introduce ESD risk. ## Temperature grade and environment Rated for 0°C to 70°C commercial temperature range. Suitable for indoor, temperature-controlled environments like office equipment, test instrumentation, and consumer electronics. Not rated for industrial or automotive extended-temperature operation. ## Lifecycle and sourcing The 67C4033-10N is listed as Active in production, so no immediate last-time-buy pressure. It is RoHS non-compliant, which may restrict use in regions with strict RoHS enforcement unless an exemption applies. Sourced and quoted to order through independent distribution; availability and current pricing confirmed at quote time.","metaTitle":"67C4033-10N FIFO, 64x5 Async, 10MHz, 20-DIP, Active","metaDescription":"67C4033-10N asynchronous FIFO, 64 x 5 depth, 10 MHz data rate, 4.5-5.5 V supply, 20-DIP through-hole. Active lifecycle. Sourced to order.","metaKeywords":null},"attributes":{"series":null,"packageCase":null,"mountingType":null,"rohsStatus":"RoHS non-compliant","productStatus":"Active","categoryPath":["Memory (DRAM / SRAM / Flash / EEPROM)"],"specifications":{"Package":"Bulk","Function":"Asynchronous","Data Rate":"10MHz","Memory Size":"64 x 5","FWFT Support":"No","Mounting Type":"Through Hole","Expansion Type":"Depth, Width","Package / Case":"20-DIP","Bus Directional":"Uni-Directional","lifecycle_stage":"eol_hot","Voltage - Supply":"4.5 V ~ 5.5 V","Operating Temperature":"0°C ~ 70°C","Retransmit Capability":"No","Current - Supply (Max)":"35mA","Supplier Device Package":"20-PDIP","Programmable Flags Support":"No"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$21.91","stockQuantity":0,"priceTiers":[{"qty":14,"price":"$21.91000","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/df840550f3b3ffef3b3307f9e9a0e438.pdf","sourceUrl":null},"ai":{"faq":[{"question":"Can 67C4033-10N be used with 3.3V logic?","answer":"No, the 67C4033-10N requires a 4.5 V to 5.5 V supply and uses 5 V logic thresholds. It is not compatible with 3.3 V logic without external level translation."},{"question":"How to cascade 67C4033-10N for deeper FIFO?","answer":"The 67C4033-10N supports depth expansion. Connect the full-flag output of the first device to the write-enable input of the next device in the chain. Width expansion is also supported by paralleling control signals across multiple chips."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/amd-xilinx/67C4033-10N","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/amd-xilinx/67C4033-10N when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}