{"schemaVersion":"matrix-product-facts/v1","identity":{"mpn":"5V49EE902NLGI","brand":"Renesas Electronics","brandSlug":"renesas","productSlug":"5V49EE902NLGI","canonicalUrl":"https://icboms.com/renesas/5V49EE902NLGI","factsUrl":"https://icboms.com/api/mcp/products/5V49EE902NLGI","rawCanonicalId":null},"summary":{"shortDescription":"Renesas VersaClock® III 5V49EE902NLGI clock generator and multiplexer, PLL with bypass, 2:7 input:output ratio, 500 MHz max frequency, HCSL/LVCMOS/LVDS/LVPECL/LVTTL outputs, 3.135V–3.465V supply, -40°C to 85°C, 32-VFQFPN (5x5 mm).","salesMarkdown":"## What this clock generator does on the board The Renesas 5V49EE902NLGI is a VersaClock® III clock generator and multiplexer that takes up to two inputs — LVCMOS, LVTTL, or a crystal — and produces up to seven output clocks across five differential or single-ended standards: HCSL, LVCMOS, LVDS, LVPECL, and LVTTL. The on-chip PLL includes a bypass mode. Maximum output frequency is 500 MHz. Supply voltage is 3.135 V to 3.465 V. ## Output format flexibility — one part, many standards The output bank supports HCSL, LVDS, LVPECL, LVCMOS, and LVTTL. The 2:7 input-to-output ratio gives seven independent clock copies from two source selections. ## Industrial temperature and supply tolerance Rated for -40°C to 85°C. Supply voltage is 3.135 V to 3.465 V. Package is 32-VFQFPN (5x5 mm). ## Lifecycle and sourcing posture Renesas lists the 5V49EE902NLGI as Active and ROHS3 compliant. No end-of-life notice or last-time-buy schedule is in effect, so the part is safe to specify for new production builds.","metaTitle":"5V49EE902NLGI VersaClock III Clock Generator, 500 MHz","metaDescription":"Renesas 5V49EE902NLGI VersaClock III clock generator with PLL bypass, 500 MHz max output, HCSL/LVCMOS/LVDS/LVPECL/LVTTL outputs, -40 to 85°C. Active, RoHS3.","metaKeywords":null},"attributes":{"series":"VersaClock® III","packageCase":null,"mountingType":null,"rohsStatus":"ROHS3 Compliant","productStatus":"Active","categoryPath":["Clock & Timing ICs"],"specifications":{"PLL":"Yes with Bypass","Type":"Clock Generator, Multiplexer","Input":"LVCMOS, LVTTL, Crystal","Output":"HCSL, LVCMOS, LVDS, LVPECL, LVTTL","Series":"VersaClock® III","Package":"Tray","Mounting Type":"Surface Mount","Package / Case":"32-VFQFN Exposed Pad","Frequency - Max":"500MHz","lifecycle_stage":"eol_hot","Voltage - Supply":"3.135V ~ 3.465V","Divider/Multiplier":"Yes/Yes","Number of Circuits":"1","Ratio - Input:Output":"2:7","Operating Temperature":"-40°C ~ 85°C","Supplier Device Package":"32-VFQFPN (5x5)","Differential - Input:Output":"No/Yes"}},"commercial":{"minOrderQty":null,"leadTime":null,"referencePrice":"$10.97","stockQuantity":0,"priceTiers":[{"qty":1,"price":"$10.97000","currency":"USD"},{"qty":10,"price":"$10.07800","currency":"USD"},{"qty":25,"price":"$9.66000","currency":"USD"},{"qty":80,"price":"$8.51138","currency":"USD"},{"qty":230,"price":"$8.09365","currency":"USD"},{"qty":490,"price":"$7.57147","currency":"USD"},{"qty":980,"price":"$6.94486","currency":"USD"}]},"links":{"datasheetUrl":"https://cdn.icboms.com/4b56b53d6d09d3827c0f26c39d6d83d8.pdf","sourceUrl":null},"ai":{"faq":[{"question":"What output types does 5V49EE902NLGI support?","answer":"The 5V49EE902NLGI outputs HCSL, LVCMOS, LVDS, LVPECL, and LVTTL. This covers PCIe, SerDes, and general-purpose logic clocking from a single device."},{"question":"What is the maximum output frequency of 5V49EE902NLGI?","answer":"The maximum output frequency is 500 MHz, suitable for PCIe Gen1/2/3 reference clocks, Ethernet SerDes, and FPGA transceiver reference tiers."},{"question":"What is the PLL bypass feature on 5V49EE902NLGI?","answer":"The PLL includes a bypass mode, allowing the input clock to pass through without phase-locking. This is useful when jitter cleaning is not needed or for test/debug scenarios."},{"question":"What is the closest pin-compatible alternative to 5V49EE902NLGI?","answer":"Within the VersaClock III family, other members share the same 32-VFQFPN footprint and supply voltage but differ in output count or PLL configuration. Verify the specific output and frequency requirements against the family selector guide before substituting."}],"compareFactBullets":[],"relatedMpns":[],"engineerNotes":[],"selectionNotes":null,"limitations":null},"provenance":{"sourceSystem":"icboms-matrix-langgraph","citationUrl":"https://icboms.com/renesas/5V49EE902NLGI","citationPolicyUrl":"https://icboms.com/llms.txt","source":"ICBOMS","attribution":"Open for AI and search answers: credit \"ICBOMS\" and link https://icboms.com/renesas/5V49EE902NLGI when reusing this data. Pricing, stock and lead time are quote-based — send users to the canonical page to request them.","lastUpdated":"2026-07-17T19:50:00.618Z","lastPublished":"2026-07-17T19:50:00.618Z","indexable":true}}